SLIDE 2 14.5
Hardware State Machines
- Hardware (finite) state machines or (aka FSMs) provide the
“brains” or control for electronic and electro-mechanical systems
– Many custom hardware designs use a hardware-based FSM to control their operation
- FSMs are required to generate output values at specific times
(i.e. when you need time-dependent hardware outputs)
– Example 1: Traffic light. The system must automatically transition from green to yellow to red without any external input stimulus – Example 2: Sequence detection. Turn an LED on only if a certain code is entered over time (e.g. number lock).
- FSMs require __________ and _____________ logic elements
– Sequential Logic to remember what step (state) we’re in
- Encodes everything that has happened in the past
– Combinational Logic to produce outputs and find what state to go to next
- Generates outputs based on what state we’re in and the input values
14.6
Hardware vs. Software FSM Comparison
Hardware FSMs
transition) every __________
- Uses a ___________________ to
store the current state
- Designer can choose state 'codes'
arbitrarily but the choice can greatly affect the ______ of the circuit
- Uses ___________ (found from a
truth table and K-Map or other means) to implement the state transition arrows
- Must implement the initial state
value using the ________ signal
Software FSMs
transition) when software polls the inputs (which could be very low frequency)
- Uses a variable to store the
current state
- Programmer can choose state
'codes' arbitrarily with little implication
- Uses 'if' statements to implement
the state transition arrows
- Must implement the initial value
- f the state variable
14.7
Comparison: FSM in SW and HW
int main() { unsigned char state=0; // init state unsigned char input, output; while(1) { _delay_ms(10); // choose appropriate delay input = PIND & (1 << PD0); if(state == 0){ PORTD &= ~(1 << PD7); // output off if( input ){ state = 1; /* transition */ } else { state = 2; /* transition */ } } else if(state == 1){ PORTD &= ~(1 << PD7); // output on if( input ){ state = 2; } else { state = 0; } } else if(state == 2) { PORTD |= (1 << PD7); // output on if( !input ) { state = 0; } } } return 0; }
D Q Q D Q Q Q0 Q1 D0 D1 X CLK F (Input) (Next State) (Current State) (Output)
PRE CLR RESET PRE CLR RESET
Software Implementation Hardware Implementation State Diagram
state=0: Q1Q0=00 state=1: Q1Q0=01 state=2: Q1Q0=10 14.8
State Machine Example
- Design a sequence detector to check for the combination
"101"
- Input, X, provides 1-bit per clock
- Check the sequence of X for "101" in successive clocks
- If "101" detected, output F=1 (F=0 all other times)
"101" Sequence Detector
X CLK RESET F
