On the issue of LQG embedded control realization in a Maglev system - - PowerPoint PPT Presentation

on the issue of lqg embedded control realization in a
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On the issue of LQG embedded control realization in a Maglev system - - PowerPoint PPT Presentation

Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works On the issue of LQG embedded control realization in a Maglev system MED2017 Kyriakos M. Deliparaschos 1 , Konstantinos Michail 2 ,


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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

On the issue of LQG embedded control realization in a Maglev system

MED’2017 Kyriakos M. Deliparaschos1, Konstantinos Michail2, Argyrios Zolotas3

1Cyprus University of Technology, Limassol, CY 2SignalGeneriX Ltd, Limassol, CY 3University of Lincoln, Lincoln, UK

3-6 July 2017

MED’2017 3-6 July 2017 1 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

Agenda

1

Introduction

2

Sensor selection and FIL

3

LQG Architecture Top Verilog module of LQG core

4

Results analysis Sensor selection Utilization summary : LQG_fil (4 id’s) and LQG_fil iba (id:8). LQG design utilization summary FPGA resources occupancy for FIL system and sub-module LQG. HDL model cosimulation Time domain response

5

Conclusions and Future works

MED’2017 3-6 July 2017 2 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

The EMS system

Electro-magnetic suspensions an important subsystem of maglev trains In terms of design specs: track following (gradients) while maintain ride quality (stochastic) Non-linear, inherently unstable system Non trivial closed-loop control requirements Which is the most appropriate sensor set to be selected?

MED’2017 3-6 July 2017 3 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

Sensor selection

Determine sensor sets whereby the closed-loop : is stable satisfies a number of closed-loop performance criteria has a minimum number of sensing elements in the selected set sensor fault tolerance The framework optimizes an LQG controller per sensor set iteratively based on separation principle : (i) First the LQR controller is optimized using Genetic Algorithms (GA) and the Pareto-optimality between the two objective functions, is found with respect to input disturbances. The LQR controller state feedback gains deduce the desired closed-loop response which is then considered as the ’ideal’ or baseline scenario for the KBE design (ii) The KBE is designed for every feasible sensor set in order to achieve the ’ideal’ closed-loop response. The selection of ’best’ sensor set is obtained via the overall control constraint violation function

MED’2017 3-6 July 2017 4 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

The FPGA-In-The-Loop concept

Hardware-in-the-loop is a well known method for testing controllers on a more realistic setup Controller on HW, while the physical system set on SW (simulation) A model-based embedded control HW/SW co-design approach is followed Here the controller is realized on an FPGA development board (Xilinx ML605) A communication link is used to interface the HW/SW parts.

MED’2017 3-6 July 2017 5 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

Optimized sensor selection framework validation using FIL

MED’2017 3-6 July 2017 6 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

LQG Architecture

(a) LQG

architecture for 3 sensor measurements (y1, y2, y3)

(b) Internal architecture of K 3×3 block

MED’2017 3-6 July 2017 7 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works Top Verilog module of LQG core

Top LQG core module

Verilog

// Linear Quadratic Gaussian (LQG) controller module module LQG ( input clk , input reset , input clk_enable , input signed [59:0] u_c_in , // sfix60_En52 input signed [64:0] i_in , // sfix65_En61 input signed [69:0] b_in , // sfix70_En69 input signed [69:0] a_in , // sfix70_En65 input [7:0] reconfig_in , // uint8

  • utput

ce_out ,

  • utput

signed [18:0] u_c_out , // sfix19_En4

  • utput

signed [64:0] i_out , // sfix65_En61

  • utput

signed [67:0] b_out , // sfix68_En71

  • utput

signed [67:0] a_out); // sfix68_En66 wire signed [67:0] KBE_out1; // sfix68_En64 wire signed [73:0] KBE_out2; // sfix74_En72 wire signed [69:0] KBE_out3; // sfix70_En75 wire signed [64:0] KBE_out4; // sfix65_En61 wire signed [67:0] KBE_out5; // sfix68_En71 wire signed [67:0] KBE_out6; // sfix68_En66 wire signed [18:0] LQR_out1; // sfix19_En4 // Kalman Bucy Estimator (KBE) KBE u_KBE (. clk(clk) ,.reset(reset), .enb(clk_enable), .u_c_in(u_c_in) ,.alphai_in(i_in), .b_in(b_in), .alphaa_in(a_in) ,. reconfig_in( reconfig_in), . x_hat1_est_state_out (KBE_out1) ,. x_hat2_est_state_out (KBE_out2), . x_hat3_est_state_out (KBE_out3) ,.i_res_out(KBE_out4 ), .b_res_out(KBE_out5), .a_res_out(KBE_out6)); // Linear Quadratic Regulator (LQR) LQR u_LQR (.clk(clk) ,.reset(reset) ,.enb(clk_enable) ,.i_in(KBE_out1), .v_in(KBE_out2) ,.g_in(KBE_out3) ,.u_c_out(LQR_out1)); assign u_c_out = LQR_out1; assign i_out = KBE_out4; assign b_out = KBE_out5; assign a_out = KBE_out6; assign ce_out = clk_enable; MED’2017 3-6 July 2017 8 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works Sensor selection

Sensor selection

id Sensor Deterministic Stochastic Ω Set response response LQR response →

  • 1

i ✗ ✗ ✗ 2 b

  • 3

(zt − z) ✗ ✗ ✗ 4 ¨ z

  • 5

i, b

  • 6

i, ¨ z

  • 7

i, b, (zt − z)

  • 8

i, b, ¨ z

  • 9

i, b, ˙ z, ¨ z

  • 10

i, b, (zt − z), ˙ z, ¨ z

  • closed-loop vertical acceleration, ¨

zrms < 0.5 m s−2, excitation coil’s current, irms < 2 A and best possible ride quality, i.e., min(¨ zrms).

MED’2017 3-6 July 2017 9 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works Utilization summary : LQG_fil (4 id’s) and LQG_fil iba (id:8).

FIL utilization summary

The utilization summary for the LQG with 4 LQG estimators and with id:8 (three sensors) Logic utilization Used (Utilization) Available LQG_fil (4 id’s) LQG_fil ib¨ z (id:8) Slice Registers 3,096 (1%) 2,410 (1%) 301,440 Slice LUTs 12,799 (8%) 4,012 (2%) 150,720 Occupied Slices 4,034 (10%) 1,402 (3%) 37,680 Bonded IOBs 30 (4%) 30 (3%) 600 Block RAMB36E1 2 (1%) 2 (1%) 416 Block RAMB18E1 1 (1%) 1 (1%) 832 BUFG 4 (12%) 5 (15%) 32 DSP48E1s 374 (48%) 73 (9%) 768 MMCM_ADVs 1 (8%) 1 (8%) 12

MED’2017 3-6 July 2017 10 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works LQG design utilization summary

LQG design utilization summary

LQG design utilization summary for sub-module LQG with 4 LQG filters and id:8 (three sensors) Module Slices Slice Reg. LUTs DSP48E1 LQG(4id’s) 0/2,579 0/236 0/9,606 0/374 KBE 341/2,314 212/212 1,269/8,558 36/316 Ad 743/743 0/0 2,732/2,732 104/104 Cd 323/323 0/0 1,182/1,182 52/52 K d 907/907 0/0 3,375/3,375 124/124 LQR 265/265 24/24 1,048/1,048 58/58 LQG(id :8) 0/265 0/113 0/884 0/73 KBE 49/221 77/77 170/717 1/50 Ad 67/67 0/0 221/221 27/27 Cd 30/30 0/0 99/99 14/14 K d 75/75 0/0 227/227 8/8 LQR 44/44 36/36 167/167 23/23

MED’2017 3-6 July 2017 11 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works FPGA resources occupancy for FIL system and sub-module LQG.

FPGA resources occupancy for FIL system and sub-module LQG.

LQG sub-module occupies the major percentage of the FIL system on the FPGA

MED’2017 3-6 July 2017 12 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works HDL model cosimulation

HDL model cosimulation

A waveform snapshot from Mentor’s ModeSim digital simulation tool during the HDL project co-simulation process The HDL simulator responds to simulation requests received from Simulink co-simulation blocks.

MED’2017 3-6 July 2017 13 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works Time domain response

Time domain response

The closed-loop response for the deterministic input has :

  • max. airgap

deviation, (zt − z)p ≤ 7.5 mm

  • max. control effort, ucp ≤ 300 V

settling time, ts ≤ 3 s airgap steady state error, e(zt −z)ss = 0 The closed-loop response for the stochastic input has : acceleration Root Mean Square (RMS), ¨ zrms ≤ 1ms−2 airgap variation RMS, (zt − z)rms ≤ 5mm control effort RMS, ucrms ≤ 300V

MED’2017 3-6 July 2017 14 / 15

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Introduction Sensor selection and FIL LQG Architecture Results analysis Conclusions and Future works

Conclusions and Future work

Conclusions FIL results for the multi-sensor set LQG implementation vs single-sensor LQG were compared LQG implementation in FIL performs adequately for all sensor sets Complex quantization procedure Extra FPGA resources compared to the single-sensor set LQG Future work Realize an integrated fault tolerance controller on the FPGA module Evaluate the performance using various sensor fault scenarios

MED’2017 3-6 July 2017 15 / 15