OFF-state TDDB in High-Voltage GaN MIS-HEMTs Shireen Warnock and - - PowerPoint PPT Presentation

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OFF-state TDDB in High-Voltage GaN MIS-HEMTs Shireen Warnock and - - PowerPoint PPT Presentation

May 25, 2023 424 likes •795 views

OFF-state TDDB in High-Voltage GaN MIS-HEMTs Shireen Warnock and Jess A. del Alamo Microsystems Technology Laboratories (MTL) Massachusetts Institute of Technology (MIT) Purp rpose Further understanding of time-dependent dielectric

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SLIDE 1

OFF-state TDDB in High-Voltage GaN MIS-HEMTs

Shireen Warnock and Jesús A. del Alamo

Microsystems Technology Laboratories (MTL) Massachusetts Institute of Technology (MIT)

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SLIDE 2

Purp rpose

  • Further understanding of time-dependent

dielectric breakdown (TDDB) in GaN MIS-HEMTs

  • Explore TDDB under high-voltage OFF-state

conditions: most common state in the operation

  • f a power switching transistor

2

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SLIDE 3

Outl tline

  • Motivation & Challenges
  • Initial Results & Breakdown Statistics
  • Ultraviolet Light During Recovery & Stress
  • Conclusions

3

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SLIDE 4

Motivation

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GaN Field-Effect Transistors (FETs) promising for high-voltage power applications  more efficient & smaller footprint

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SLIDE 5

Ga GaN N Reliability Challenges

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Inverse piezoelectric effect

  • J. A. del Alamo, MR 2009
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SLIDE 6

Ga GaN N Reliability Challenges

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Inverse piezoelectric effect

  • J. A. del Alamo, MR 2009

Current collapse

  • D. Jin, IEDM 2013
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SLIDE 7

Ga GaN N Reliability Challenges

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Inverse piezoelectric effect

  • J. A. del Alamo, MR 2009

Current collapse

  • D. Jin, IEDM 2013

VT instability

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SLIDE 8

Ga GaN N Reliability Challenges

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Inverse piezoelectric effect

  • J. A. del Alamo, MR 2009

Current collapse

  • D. Jin, IEDM 2013

Gate dielectric reliability

VT instability

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SLIDE 9

Time me-Dep epen enden ent D Dielectr tric ic B Brea eakdown

  • High gate bias → defect generation → catastrophic oxide

breakdown

  • Often dictates lifetime of chip

9

  • D. R. Wolters,

Philips J. Res. 1985

  • T. Kauerauf, EDL 2005

Typical TDDB experiments: Si high-k MOSFETs Gate material melted after breakdown

Si MOSFET

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SLIDE 10

TDDB DDB i in G GaN MIS-HEMTs Ts

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  • G. Meneghesso, SST 2016

T.-L. Wu, IRPS 2013

  • S. Warnock,

CS MANTECH 2015

  • Classic TDDB observed
  • But: studies to date all on positive gate stress TDDB

→ More relevant for D-mode devices: TDDB under OFF-state

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SLIDE 11

OFF-state te S Stress

  • Negative gate bias turns FET off; high bias on drain
  • Relevant operational condition for GaN power circuits

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SLIDE 12

OFF-state te S Stress

  • Negative gate bias turns FET off; high bias on drain
  • Relevant operational condition for GaN power circuits
  • Electrostatics more complicated than under positive gate stress

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  • TDDB failure can result from peak in electric field during OFF-state
  • Study devices with no field plates for simplicity

Positive gate stress OFF-state stress

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SLIDE 13

Dielectr tric Reliability ty in GaN FE FETs

AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs)

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Goals of this work:

  • What does TDDB look like in the OFF-state stress condition?
  • How do transient instabilities (current collapse, VT shift) affect
  • ur ability to observe TDDB?
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SLIDE 14

Initi tial R Results ts & Breakdown Stati tisti tics

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SLIDE 15

Ga GaN N MIS-HEMTs for T TDDB DB Stud udy

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  • GaN MIS-HEMTs from industry

collaboration: depletion-mode

  • Gate stack has multiple layers &

interfaces

→ Uncertain electric field distribution → Many trapping sites

  • Complex dynamics involved

→ Unstable and fast changing VT → Current collapse

  • A. Guo,

IRPS 2016 GaN MOSFET

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SLIDE 16

Consta tant nt-Voltage OFF FF-sta tate Stre ress

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VGS,stress< 0 V, high VDS,stress IG=ID  damage at drain-side edge of gate

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SLIDE 17

Consta tant nt-Voltage OFF FF-sta tate Stre ress

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VGS,stress< 0 V, high VDS,stress

soft breakdown

IG=ID  damage at drain-side edge of gate

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SLIDE 18

Consta tant nt-Voltage OFF FF-sta tate Stre ress

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VGS,stress< 0 V, high VDS,stress

soft breakdown

IG=ID  damage at drain-side edge of gate

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SLIDE 19

Consta tant nt-Voltage OFF FF-sta tate Stre ress

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VGS,stress< 0 V, high VDS,stress

soft breakdown final hard breakdown

tBD

IG=ID  damage at drain-side edge of gate

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SLIDE 20

Consta tant nt-Voltage OFF FF-sta tate Stre ress

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Pause stress every 50 s and characterize device

stress

  • Multiple jumps in stress IG before final breakdown

‒ Corresponds to increase in I-V OFF-state leakage

  • Significant current collapse

characterization

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SLIDE 21

OF OFF-sta tate Step-Stress

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Step VDS,stress: ΔVDS,stress=5 V, each 100 s/step

  • Moderate stress: IG=ID decreases during stress step

 trapping

  • High stress: IG increases  stress-induced leakage current (SILC)
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SLIDE 22

OF OFF-sta tate Step-Stress

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Transfer characteristics in between stress steps

  • Very large VT shifts (first positive, then negative) and hysteresis
  • Progressive increase in current collapse for increasing VDS,stress
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SLIDE 23

OF OFF-sta tate TDDB Sta tatistics

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  • Statistics do not follow Weibull distribution
  • Spread over many orders of magnitude

Time to final breakdown (IG=1 mA)

positive gate stress TDDB

  • S. Warnock, IRPS 2016
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SLIDE 24

Trapping a at Drain-end o

  • f Chann

nnel

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  • Trapping affects electric field
  • Depends on trap concentration, location, etc.

 highly random In OFF-state, large electric field peak at drain-end of channel  Severe electron trapping

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SLIDE 25

Ultravi violet Light Duri ring Recove very & Stre ress

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SLIDE 26

UV Li Light t t to Miti tigate Trapping

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Need to separate current collapse, VT shift from permanent degradation

  • UV light very effective for de-trapping in GaN
  • Choose 3.5 eV for TDDB study
  • D. Jin, IEDM 2013
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SLIDE 27

OFF-state S e Step ep-Stress: R : Rec ecovery with th U UV

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  • Step VDS,stress: ΔVDS,stress=5 V, each 100 s
  • Before characterization, shine 3.5 eV UV light for 5 minutes after

each stress step

  • No UV during stress  expect unchanged stress leakage current
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SLIDE 28

OFF-state S e Step ep-Stress: R : Rec ecovery with th U UV

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Transfer characteristics in between stress steps

  • Current collapse mitigated
  • No positive VT shift, only negative  NBTI
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SLIDE 29

OFF-state S e Step ep-Stress ss: S Stress w s with UV UV

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  • Step VDS,stress: ΔVDS,stress=5 V, each step 100 s/step
  • 3.5 eV UV light during stress, and 5 minutes after (to eliminate residual

trapping)

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SLIDE 30

OFF-state S e Step ep-Stress ss: S Stress w s with UV UV

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  • Step VDS,stress: ΔVDS,stress=5 V, 100 s/step
  • No evidence of trapping for moderate VDS,stress
  • Clear appearance of SILC at higher voltage
  • Breakdown at 60 V compared to ~110 V for step-stress in dark

(step-stress in dark)

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SLIDE 31

OFF-state S e Step ep-Stress ss: S Stress w s with UV UV

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Transfer characteristics in between stress steps

  • Current collapse entirely mitigated
  • Negative VT shift  NBTI
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SLIDE 32

OF OFF-sta state C Const stant-Voltage T TDDB S Statisti tics cs

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  • UV statistics now follow Weibull distribution
  • Breakdown occurs sooner, even with VDS,stress ~25% less
  • UV mitigates trapping  electric field ↑

Compare TDDB in the dark and with 3.5 eV UV during stress

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SLIDE 33

Conclusions

  • Investigated OFF-state TDDB in GaN MIS-HEMTs for the

first time

  • Without UV light:

‒ Current collapse, VT shift ‒ Cannot separate transient and permanent effects ‒ Non-Weibull breakdown statistics

  • With UV light:

‒ Current collapse completed mitigated ‒ Progressive negative VT shift  NBTI ‒ UV de-trapping yields higher electric field  accelerated breakdown ‒ Breakdown follows Weibull distribution

  • Next work: estimate electric field to develop lifetime

model

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SLIDE 34

Acknowled edgem emen ents

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  • Dr. José Jiménez, IRPS 2017 mentor
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SLIDE 35

Qu Ques estion

  • ns?

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