1 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Is there a Future for Differentiating ICs for High- End Televisions - - PowerPoint PPT Presentation
Is there a Future for Differentiating ICs for High- End Televisions - - PowerPoint PPT Presentation
Is there a Future for Differentiating ICs for High- End Televisions ? MPSoC04 9 July 2004 Rafael Peset Llopis Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 1 Outline High-end televisions Picture Quality
2 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
3 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Television Market
Three market segments:
– High 1M Philips sets 1500-10000 $ – Mid 3M Philips sets 500-1500 $ – Low 9M Philips sets < 500 $
Philips Consumer Electronics
– #2 worldwide – #1 Europe
Market players:
– Leaders; present in high-end – Followers
4 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Philips Consumer Electronics
127 cm
High-End Television
5 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
High-End Television
High-end market segment:
– Entry point innovation – Large margins – Branding – Differentiation is key
Current differentiation on picture quality SD/HD source => HD display (Europe/USA)
– Spatial up-conversion – Temporal up-conversion – Image enhancements
6 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
7 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Picture Quality Roadmap
Digital image processing improvements like:
– Sub pixel based luminance transient improvement – Dynamic contrast – Digital natural motion – Color dependent sharpness – Green enhancement – Blue stretch – Skin tone correction – 3-dimensional digital noise reduction – scaling
Three EISA awards!!
8 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Statistics: 401135 gates 32 mm2 278.4 kbit RAM 64 MHz 3 DAC’s PLL 0.18u; 4 metal layers 590 mW
Picture Quality Roadmap
9 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
36,1% 32,8% 33,1% 38,2% 46,8% 48,5% 49,1%
0% 10% 20% 30% 40% 50% 60%
FEB02- MAR02 APR02- MAY02 JUN02- JUL02 AUG02- SEP02 OCT02- NOV02 DEC02- JAN03 FEB03- MAR03
PHILIPS GRP SONY GRUNDIG PANASONIC LOEWE
THOMSON GRP
Picture Quality Roadmap
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Picture Quality Roadmap
So far so good… How is it implemented?
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High End Mid End Low End
Picture Quality Roadmap
Generation N Generation N+1
2
C B A
PS PS PS
D C B
PS PS PS
12 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Picture Quality Roadmap
So far so good… How is it implemented?
– Common TV platform provided by Philips Semiconductors – Differentiation with additional key ICs – Migration to future common TV platform
Lead time of differentiating functionality in market!
13 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Picture Quality Roadmap
2500% 1250% 500% 150% 100% #Mgates
- excl. mem
2000% 1000% 500% 170% 100% #Mgates
- incl. mem
350+ 250 133 64 64 frequency (MHz) 65 90 120 180 180 technology (nm) 1200% 600% 320% 140% 100% resources (manyears) 2010 2007 2005 2003 2001 year G5 G4 G3 G2 G1
65 90 120 180 180 1200% 600% 320% 140% 100% 2500% 1250% 500% 150% 100% 2000% 1000% 500% 170% 100%
14 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Picture Quality Roadmap
So there is the pain!!
– Exploding engineering costs – Exploding complexity – Exploding mask costs (~1M $ for 0.065u)!!
Current design approach is unsustainable
– Innovation will stop
RIP
15 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
16 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Huge computational requirements
– HD @ 100fps = 200M pixels/s – 1 pixel per clock – 100-400 GOPS – Regular & control dominated pixel processing
Communication requirements:
– Streaming data – Latency tolerant (beware audio/video & football)
Power dissipation bounded (no fans) Many different use cases (diversity) Stability
Requirements
(no + + )
Ctrl Alt Del
17 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Current Approach
Computation:
– RTL VHDL blocks – Heavy pipelining
Communication:
– FIFO buffers – Handshaking – Bypasses – Centralized memory
Chain of video processing functions:
18 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Current Approach
Many different use cases:
– Source (size, frame rate, TV, movie) – Display (size, type)
Superset approach:
– Large volume – High complexity – Verification issue !!!!
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Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
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Technology Evolution
0. 001 0. 01 0. 1 1 10 100 1000 10000 100000 Jan- 90 Jan- 95 Jan- 00 Jan- 05 Jan- 10 Year G OPS ASI C t r end ASI C al t er a t r end FPGA DSP RI SC i nt el t r end MPU
ASICs are overkill Embedded cores provides less performance than stand-alone cores
21 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
0. 001 0. 01 0. 1 1 10 100 1000 Jan- 90 Jan- 95 Jan- 00 Jan- 05 Jan- 10 Year G OPS/ W
ASI C t r end ASI C al t er a t r end FPGA DSP RI SC i nt el t r end MPU
Technology Evolution
FPGAs have improved in power efficiency Embedded cores are more power efficient than stand-alone cores 80x 3x
22 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
0. 00001 0. 0001 0. 001 0. 01 0. 1 1 10 100 1000 Jan- 90 Jan- 95 Jan- 00 Jan- 05 Jan- 10 Year G OPS/ m m 2
ASI C t r end ASI C al t er a t r end FPGA DSP RI SC i nt el t r end MPU
Technology Evolution
20x 40x
Embedded cores are more area efficient than stand-alone cores
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Technology Evolution
Observations:
– FPGAs and processors providing sufficient performance – Huge area and power expenses – Hybrids seem likely
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Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
25 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis
Solution?
Subset with flexibility approach: Key:
– Composability – Flexibility – Scalability
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Solution?
Exploding complexity and engineering costs:
Next step in design paradigm
Transistors => standard cells => synthesis => ?
Subset with flexibility approach IP reuse Composability
Exploding mask costs:
Even larger volumes Share silicon over more products Flexibility/scalability
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Computation:
Embedded processors? Dedicated HW blocks? Flexible (eFPGA) HW blocks?
Communication:
Point to point? Busses? Network on Chip?
Solution?
A B D E G H C F I
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Embedded Processors:
(Tunable) RISC / CISC VLIW / ULIW SIMD / vector Is SW cheaper than HW?
Dedicated HW blocks:
Behavioral synthesis
Flexible HW blocks:
Behavioral Synthesis Several e-FPGA blocks Fixed blocks with e-FPGA parts
Computation
1 pel/clk 20x area
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Point to point:
Inflexible Not scalable
Busses:
Not scalable
Network on Chip:
Flexible and scalable
Key aspects:
– Cost / area – Required degree of flexibility (diversity) – Composability
Communication
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Outline
- High-end televisions
- Picture Quality Roadmap
- Current approach
- Technology Roadmap
- Solution?
- Conclusions
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Conclusions Questions/Challenges
Computation:
– Optimal mix ASIC / e-FPGA / programmable cores – What should be flexible, what not – Programming model
Communication:
– Composability – Flexibility / scalability
Both:
– Power / area efficiency – Engineering efficiency
Total cost (engineering hours + masks + silicon area)
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