Integrated test environment for a part of the LHCb calorimeter - - PowerPoint PPT Presentation

integrated test environment for a part of the lhcb
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Integrated test environment for a part of the LHCb calorimeter - - PowerPoint PPT Presentation

Integrated test environment for a part of the LHCb calorimeter TWEPP 2009 Carlos Abellan Beteta La Salle, URL 22/9/2009 TWEPP09 Parallel session B2a - Production, testing and reliability Integrated test environment for a part of the LHCb


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SLIDE 1

Integrated test environment for a part of the LHCb calorimeter

TWEPP 2009

Carlos Abellan Beteta La Salle, URL

22/9/2009 TWEPP09 Parallel session B2a - Production, testing and reliability

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SLIDE 2

Integrated test environment for a part of the LHCb calorimeter PRESENTATION OUTLINE

  • Introduction
  • Real environment
  • Former test boards
  • Final test board
  • Final test board

– Test capabilities – Features

  • Conclusions

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 2

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SLIDE 3

Introduction

  • LHCb calorimeter
  • Future testing needs

– Reparation needs – Non expert tests – Integration – Integration – Usability

  • No need of full laboratory
  • Stability (Software but also Mechanical, loose wires, ...)

– Kaizen (Continued Improvement) – Product continuity (FPGA)

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 3

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SLIDE 4

Real Environment

  • LHCb calorimeter:

– Power Supply – Clock distribution – Trigger data flow – DAQ data flow

  • 22/9/2009

Parallel session B2a - Production, testing and reliability Slide 4

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SLIDE 5

Real Environment

  • Data from VFE to PSFEB is composed by 4

LVDS serializers of 21b at 840Mbps each one.

  • Data from 7 PSFEB to a single CB is

7*840Mbps.

  • Data from CB to SB is about 1,2Gbps of
  • Data from CB to SB is about 1,2Gbps of

payload with an optical link.

  • Control has I2C bidirectional control as well

as a serial synchronous 40MHz channel for time sensitive controls.

  • Huge amount of data flows through the

system

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 5

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SLIDE 6

Former test boards

  • FPGA Baseline

– Originally Parallax Board with Stratix EP1S25F672C6

  • Nice solution for prototyping &

tests (Discontinued by vendor)

  • Good form factor

– Extended design done by our – Extended design done by our group

  • Same philosophy
  • USB instead of RS232, usable not
  • nly for programming.
  • Aprox. Double of pins
  • Backwards compatible
  • More powerful Stratix II

EP2S60F484C5

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 6

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SLIDE 7

Former test boards

  • Control Board
  • Data from the backplane (PSFEB -> CB)
  • SPECS from the backplane
  • Optical Link Receiver
  • USB interface with a mezzanine by Bitwise Systems

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 7

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SLIDE 8

Former test boards

  • Very Front End

– Digital Part

  • PreShower Front End Board

reception

  • Control of the VFE can be

driven from the Control Board driven from the Control Board

  • r from test board
  • Connection through real LDVS

cable ensures maximum realism

  • USB interface with a

mezzanine by Bitwise Systems

  • Can also work with the Photo

Multiplier test environment to test the analogical part

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 8

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SLIDE 9

Former test boards

  • Very Front End

– Analogical Part

  • High voltage power supply

for the PMTs

  • Dark box to test with

controlled light

  • Motorized optical fiber

emits pulsed light on the emits pulsed light on the desired channel of the PMT

  • Also diffuse pulsed light is

available

  • Motor control is done by a

computer while triggering of light pulses is done by the VFE’s test board that also collects the resulting data

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 9

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SLIDE 10

Former test boards

  • Link supervision

– Clock distribution very important for our system, it defines integration time. Must be easily checkable. – Communication between the VFE/RB and the CB is done by an ad-hoc I2C with only two pairs. Focus of doubts, also tested. two pairs. Focus of doubts, also tested. – Able to supervise signal shapes and communications. – Able to substitute a VFE and view what would it receive. – Able to check relative phases of the 8 clocks available on a CB.

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 10

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SLIDE 11

Former test boards

  • Mixing real detector with “emulated” parts

– Test for the data cabling with LVDS pattern

  • With real datapath
  • With test board instead of PSFEB

– Test for analogical noise and offset

  • With real datapath
  • With test board instead of PSFEB
  • With test board instead of PSFEB

– Test for the control cabling

  • With real datapath
  • With test board instead of CB
  • With scope

– All of them very useful to isolate problems and try to solve them.

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 11

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SLIDE 12

Final test board

  • USB
  • Ethernet
  • WiFi
  • LVDS Data
  • LVDS Data
  • Control Cables
  • Optical
  • Power
  • PMTs env.
  • Spy

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 12

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SLIDE 13

Final test board

– Test capabilities

Test

Control

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 13

Test

Control Board

VFE

PMT Test

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SLIDE 14

Final test board

  • Features

– Mechanical resistance

  • One must not expect careful manipulation

by an average user.

  • Old one had clear mechanical flaws.
  • Common in systems designed during
  • Common in systems designed during

prototyping tests. (Loose wires,...)

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 14

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SLIDE 15

Final test board

  • Mechanical resistance

−21 screws,

10mm aluminium plate

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 15

plate − Good fixation

  • f optical link

− Good fixation

  • f LVDS

cable

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SLIDE 16

Final test board

  • Less laboratory dependant

– Power – Clock – Scope – Special SW on PC – Special SW on PC

  • Now:

– Clock generator – Power Regulator – No SW needed*

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 16

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SLIDE 17

Final test board

  • Better interface:

– USB – Ethernet/WiFi (compatible with various models with integrated web server)

  • Portable:
  • Portable:

– O.S. Independent (No drivers) – No applications – Always Updated software

  • Usable:

– Remotely operated (expert at home, ALARA reasons, etc)

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 17

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SLIDE 18

Conclusions

– Ready for future tests and reparations – System suitable for average user

  • Usable
  • Stable
  • Intended for average user

– Better interface – Better interface

  • Ethernet is a great advantage

– More test possibilities

  • New data paths not available before

– Less lab dependant – Solved problems learned by using testing boards

22/9/2009 Parallel session B2a - Production, testing and reliability Slide 18