HiSIM1.2: The Effective HiSIM1.2: The Effective Gate Geometry Gate - - PowerPoint PPT Presentation

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HiSIM1.2: The Effective HiSIM1.2: The Effective Gate Geometry Gate - - PowerPoint PPT Presentation

HiSIM1.2: The Effective HiSIM1.2: The Effective Gate Geometry Gate Geometry Determination with the Determination with the Capacitance Data Capacitance Data Yoshihisa Iino Yoshihisa Iino SILVACO Japan SILVACO Japan 2005 Workshop on


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SLIDE 1

HiSIM1.2: The Effective HiSIM1.2: The Effective Gate Geometry Gate Geometry Determination with the Determination with the Capacitance Data Capacitance Data

Yoshihisa Iino Yoshihisa Iino SILVACO Japan SILVACO Japan

2005 Workshop on Compact Modeling 2005 Workshop on Compact Modeling May 10, 2005, Anaheim, California, U.S.A. May 10, 2005, Anaheim, California, U.S.A.

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SLIDE 2

05/11/'05 2005 Workshop 2

Motivation of this study

  • HiSIM-1.2 has no dedicated parameters for the

gate capacitance. And the capacitance for the shorter channel devices showed the discrepancy with the measurement in spite of the good DC fitting. WHY ????

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SLIDE 3

05/11/'05 2005 Workshop 3

Ids/Vds @Vbs=0 Vds = 0 -> 1.0V Vgs = “ nearVth”

  • > 1.0V

Ids/Vgs@Vds=0.05V Vgs = 0 -> 1.0V Vbs = 0 -> -0.5V

solid red: measurements dashed black: HiSIM-1.2

Motivation of the study: HiSIM-1.2 example not a bad DC result

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SLIDE 4

05/11/'05 2005 Workshop 4

solid red: measurements dashed black: HiSIM-1.2

Motivation of the study: HiSIM-1.2 example the incorrect gate capacitance for the shorter channel

The measured peak capacitance values are almost proportional to the channel length.

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SLIDE 5

05/11/'05 2005 Workshop 5

A simple fact of HiSIM-1.2

  • HiSIM gate capacitance which is derived from the

charges depends naturally on the gate area. The gate geometry correction should be able to modify the capacitance value.

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SLIDE 6

05/11/'05 2005 Workshop 6

HiSIM-1.2 geometry adjustment: fitting to the peak capacitance

The inversion loses the accuracy for the shorter channel.

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SLIDE 7

05/11/'05 2005 Workshop 7

Another simple fact of HiSIM-1.2

  • The substrate impurity concentration has four

variables. Nsubc, Leff, and Lp are fixed beforehand.

  • The Nsubp is the variable for the weak inversion

capacitance of the shorter channel length .

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SLIDE 8

05/11/'05 2005 Workshop 8

Fixing HiSIM-1.2 pocket concentration parameter

HiSIM-1.2 gate overlap capacitance is implemented incorrectly.

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SLIDE 9

05/11/'05 2005 Workshop 9

HiSIM-1.2 parameters fixed to the gate capacitance

  • HiSIM-1.2 parameters such as geometry, and substrate

variables can be determined using the gate capacitance data. However, the Ids versus Vgs curves to validate the threshold voltage roll up and off aren’t sufficient.

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SLIDE 10

05/11/'05 2005 Workshop 10

HiSIM-1.2 DC curves fixed to the gate capacitance

The channel length correction is overestimated. The pocket impurity concentration is underestimated.

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SLIDE 11

05/11/'05 2005 Workshop 11

Procedure to extract HiSIM-1.2 physical parameters

  • 1. Specify TOX
  • 2. Determine NSUBC, VFBC for a large area gate capacitance

The initial NSUBP is the same as NSUBC.

  • 3. Determine LP(pocket penetration length) from Vth vs. L.

LP is a point where the radical Vth roll up starts: about 1 um for the example.

LP= 1um

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SLIDE 12

05/11/'05 2005 Workshop 12

  • 4. Determine channel length correction for gate capacitance
  • 5. Fix NSUBP(maximum pocket concentration) for gate

capacitance inversion

Procedure to extract HiSIM-1.2 physical parameters

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SLIDE 13

05/11/'05 2005 Workshop 13

Procedure to extract HiSIM-1.2 physical parameters

  • 6. Validate Id-Vgs and adjust NSUBP

Try to correct less for the gate gemetry parameters

  • 7. Adjust the low field mobility

Ids/Vgs@Vds=0.05V Vgs = 0 -> 1.0V Vbs = 0 -> -0.5V

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SLIDE 14

05/11/'05 2005 Workshop 14

Start NSUBP & LP effect SCP1 effect on shorter length than LP point SC1 effect on the Vth roll-off SC3 effect on the Vth roll-off mainly for Vbs

HiSIM-1.2 parameters for the electric field gradient

The scalable parameter effects for Vth vs. L are apparent.

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SLIDE 15

05/11/'05 2005 Workshop 15

Acknowledgement

The author would like to thank Semiconductor Technology Academic Research Center (STARC), Yokohama, Japan, for permitting me to use the device data.

Thank you!