High-Level and Model-Based Design Targeting FPGAs and SoCs Sander - PowerPoint PPT Presentation

CO-DEVELOPMENT MANUFACTURING INNOVATION & SUPPORT High-Level and Model-Based Design Targeting FPGAs and SoCs Sander Ter Burg, FPGA System Engineer

3T B.V.  What we do: ■ Electronic and Embedded Systems ■ Co-Development and Re-design ■ Manufacturing (together with production partners) ■ Consulting & Support  Where we are: ■ Enschede + Eindhoven  More info: ■ www.3T.nl ■ info@3T.nl www.3t.eu 30 May 2017 2

Summary  High-Level Design and Synthesis  Model-Based Design  Model-Based Design Examples ■ SCARA Robot Braking Controller ■ Radar Tracking Module www.3t.eu 30 May 2017 3

Traditional HDL Design example  All code written in HDL FPGA Design  No CPUs on-board HDL HDL  HDL to Low Level Logic HDL HDL HDL = Hardware Description Language www.3t.eu 30 May 2017 4

High(er)-Level Design example PSoC Higher Level Design Blocks Logic (FPGA)  High-Level Model to HDL High-Level HDL  C/C++ code running on a CPU Model HLS examples µC (Arm)  C/C++ to HDL + synthesis C/C++ HDL  MATLAB to HDL + synthesis  … to HDL + synthesis www.3t.eu 30 May 2017 5

High Level Design Tools For FPGA devices: For SoC devices:  Vivado HLS (Xilinx)  SDSoC (Xilinx)  HLS Compiler (Intel)  SDK for OpenCL (Intel)  HDL Coder (MathWorks)  Embedded Coder (MathWorks)  and more…  and more… www.3t.eu 30 May 2017 6

High Level Design Pros …  Well suited for complex mathematical problems  Fast Functional Iterations  Freedom of implementation (CPU and/or Logic)  Simulation time reduction (in software)  Early resource estimation  HDL Co-Simulation in software environment  Software Engineers can now write Hardware www.3t.eu 30 May 2017 7

High Level Design Cons …  Hardware mind-set still needed  Code restructuring needed  Generated HDL is not very readable  Less suitable for (peripheral) interface controllers  But… tools keep getting better www.3t.eu 30 May 2017 8

Model-Based Design  A form of High-Level Designing  Mathematical and visual design method  To design: ■ Complex controllers ■ Signal processing ■ Communication systems  Applications fields examples: ■ Industrial ■ Aerospace ■ Automotive www.3t.eu 30 May 2017 9

Real vs. Virtual World Virtual Controller Plant Application World Model Model Model Real Controller Plant Application World www.3t.eu 30 May 2017 10

Model-Based Design  Multidisciplinary Design Approach  Design with Virtual Models (without hardware)  Simulation in the Virtual environment  Models are always a complexity / effort trade-off  Controller Model as good as your Plant/Appl. Model www.3t.eu 30 May 2017 11

Model-Based Design Examples  SCARA Robot Braking Controller  Radar Tracking Module www.3t.eu 30 May 2017 12

SCARA Robot Braking Application  Move intermediate semiconductor products  Controlled emergency braking  Braking Requirements: ■ Follow robot trajectory while braking ■ Deviation from trajectory < 1mm ■ Rest is under NDA…  Customer provided Mechanical Models (in MATLAB Simulink) ■ SCARA Motor Model ■ Controller Model www.3t.eu 30 May 2017 13

Simulink Model of Plant and Controller Angular Velocity Torque Braking Controller SCARA Motor Model (Simulink) (Simulink) Angle www.3t.eu 30 May 2017 14

Simulink Braking Controller Model Braking Controller Model Hardware Model Angular Velocity Torque M2E ADC FPGA Model DAC E2M Angle www.3t.eu 30 May 2017 15

Simulink FPGA Model FPGA Model Comm. Control / Status / Communication Logic Regulator Model Motor Motor Calculate Feedback Controller ADC Braking DAC Angle + Control Controller Control Direction www.3t.eu 30 May 2017 16

Simulink Braking Regulator (Model to HDL) Variable Time Step Fixed Time Step Floating Point Model Floating Point Model Fixed Time Step Fixed Time Step Fixed Point Model Fixed Point HDL Code www.3t.eu 30 May 2017 17

Braking Regulator HDL Co-Simulation Braking Controller (Simulink) Angular Velocity Torque SCARA Motor Model Regulator Model (Simulink) Angle HDL Simulation (ModelSim) www.3t.eu 30 May 2017 18

Design and Verification Summary  From “High Level Model” to “Generated HDL” ■ Various Model Translations  Generated HDL for Regulator Model (HDL Coder) ■ Angle/Direction Calculation + Braking Controller  Hardcoded Design Blocks (non HDL Coder) ■ ADC / DAC Control + Control / Status / Communication Blocks  Design Verification: ■ Co-Simulation + Hardware-in-the-Loop  Design Fine-tuning: ■ Timing Closure, Resource Sharing, ■ Xilinx IP Instantiation for FFT www.3t.eu 30 May 2017 19

Radar Tracking Module example  For Traffic Data processing  Customer provided a High-Level Model (MATLAB) including: ■ Radar Module ■ Signal Processing ■ Tracking Algorithm  System-on-Module Hardware Target ■ Enclustra Mars ZX3 www.3t.eu 30 May 2017 20

SoC implementation setup  eCos RTOS on CPU1 Dual ARM Core CPU 1 CPU 2 ■ For real-time Control and Communication ■ Only available RTOS for this SoM Control Tracking  Tracking Algorithms on CPU2 ■ Generated C/C++ from Matlab Model ■ Running bare-metal on CPU2 Ext. Buffers  Image Processing in FPGA LOGIC Ethernet ■ 2D Traffic Data Matrices Operations Image Processing Data Acquisition FPGA LOGIC www.3t.eu 30 May 2017 21

Radar Tracking Model Radar Tracking Model (MATLAB) Image Processing Model Radar Model Tracking Dec. FFT 1 FFT 2 2D Traffic Algoritme Data Intermediate Result Files www.3t.eu 30 May 2017 22

Image Processing Module Simulation File In HDL TestBench File Out Image Processing Block (Decimate / FFT1 / FFT2)  Intermediate Model Results used in HDL TestBench  HDL TestBench Results verified in the Model www.3t.eu 30 May 2017 23

Hardware-in-the-Loop Verification Dual ARM Core CPU 1 CPU 2 Control Tracking External Buffers Ethernet Data Decimate FFT 1 FFT 2 Data Control Acquisition FPGA LOGIC www.3t.eu 30 May 2017 24

Tooling  Mathworks Tools: ■ MATLAB: Complete Radar Tracking Model ■ Embedded coder: Tracking Algorithms Implementation ■ Instrument Control toolbox: Hardware-in-the-Loop Verification ■ Signal processing toolbox: Digital Filter Design  Xilinx Vivado: ■ Xilinx IP: FFTs for Image Processing ■ Xilinx IP: Gbit Ethernet for UDP communication ■ Custom IP: Decimate for Image Processing  Xilinx to MATLAB: Xilinx FFT C-model converted to MATLAB file www.3t.eu 30 May 2017 25

Summary and More Info:  High-Level Design and Synthesis  Model-Based Design  SCARA Robot Braking Controller  Radar Tracking Module Next Up:  Email : Sander@3T.nl  Herman Kuster  Web : www.3T.nl  Topic Embedded Systems  Stand: 7A108  Hardware platform for industrial ultrasound steel plate Inspection www.3t.eu 30 May 2017 26

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