Outline Software Software Design Design Enrico Bini Enrico Bini - PDF document

� Component- Component- Based Based Outline Software Software Design Design Enrico Bini Enrico Bini Design Design problem problem Component-Based Software Design Model of VM Model of VM Hierarchical Real-Time Scheduling lecture 3/4 1 Design problem Enrico Bini 2 Model of VM March 24, 2015 Component- Component- Based Based The design problem over parallel Outline Software Software Design Design VM Enrico Bini Enrico Bini Design Design Premise: the terms multi-core, multiprocessor, parallel problem problem Model of VM machine, etc. are all used interchangeably, as they all are Model of VM machines capable to perform computation simultaneously. 1 Design problem What is the best VM which can schedule a given real-time application ? Needed ingredients: 2 Model of VM • A model of a parallel VM • An application model • Local scheduler of application over VM • Notion of “best” • Optimization method Component- Component- Based Based Main characteristic of multicore VM schedule Software Software Design Design Enrico Bini Enrico Bini Resource is available along two dimensions A schedule is modeled by a set of n VM schedule functions Design Design • horizontal dimension over time problem problem s i : T → 2 M i ∈ N Model of VM Model of VM • vertical dimension over the number of processing units In short: such that • two machines of speed 0 . 5 and ∀ t ∈ T , ∀ i 6 = j, s i ( t ) ∩ s j ( t ) = ∅ • one machine of speed 1 are di ff erent. that is no machine can be used simultaneously by two VMs. Migration hypothesis: Equivalently: s i,k ( t ) schedule of i -th VM over k -th CPU at t 1 migration/identical multiprocessor: the work can freely i ∈ N , s i,k : T → { 0 , 1 } migrate over all CPUs and it takes the same amount of time n ∀ t, k, s i,k ( t ) ≤ 1 core k at t to at most 1 VM • reasonable as fi rst approximation • in reality migration has a non-uniform (cache hierarchies) i =1 cost

� � � � � �� � � �� � � � � Component- Component- Based Based Legal schedules Parallel supply lower bound Software Software Design Design function Enrico Bini Enrico Bini Given a global scheduling algorithm A , we denote by L ∗ the set Design Design De fi nition ( parallel supply lower (bound) function of a VM) of all possible legal VM scheduling functions, de fi ned as problem problem Given a VM, we de fi ne its parallel supply lower bound function Model of VM Model of VM L ∗ = { ( s i,k ) i ∈ N ,k ∈ M : scheduling functions pslf k ( t ) with maximum parallelism k as ( s i,k ) i ∈ N ,k ∈ M may be generated by A} , � t 0 + t m pslf k ( t ) = min min k, s ℓ ( x ) dx. while the set L i of legal scheduling functions for i -th VM is t 0 ∈ T , ( s 1 ,...,s m ) ∈ L t 0 ℓ =1 de fi ned as a projection of L ∗ , that is [indentical hyp means � s ℓ ] L i = { ( s i,k ) k ∈ M : ( s i,k ) i ∈ N ,k ∈ M ∈ L ∗ } . “minimum amount of resource made available by the VM in Since we focus on one VM only, we drop the index i of every interval of length t , with parallelism at most k ”. the VM Notice that pslf k ( t ) depends on L i ⇒ L , s i,k ( t ) ⇒ s k ( t ) 1 the length of the time interval t , and k is the index of the assigned physical machine 2 the level of parallelism k , to represent the bi-dimensional nature of the resource. Component- Component- Based Based Parallel supply upper bound Properties Software Software Design Design function Enrico Bini Enrico Bini 1 ∀ k, pslf k (0) = 0 (no resource in empty interval), Design Design 2 ∀ k, ∀ s ≥ t ≥ 0 , pslf k ( s ) ≥ pslf k ( t ) (non-decreasing) problem problem 3 ∀ k, ∀ s, t ≥ 0 , pslf k ( s + t ) ≥ pslf k ( s ) + pslf k ( t ) Model of VM Model of VM (super-additivity) De fi nition ( parallel supply upper (bound) function of a VM) 4 ∀ k, ∀ s ≥ t ≥ 0 , pslf k ( s ) − pslf k ( t ) ≤ k ( s − t ) (Lipschitz Given a VM, we de fi ne its parallel supply upper bound function continuous with factor k ): psuf k ( t ) with maximum parallelism k as 5 when needed, we extend ∀ k ≤ 0 , pslf k ( t ) = 0 6 ∀ k, ∀ t ≥ 0 , pslf k ( t ) ≤ pslf k +1 ( t ) (non-decr with k ) � t 0 + t m psuf k ( t ) = max min s ℓ ( x ) k, dx. 7 (def): ¯ m = min { k : ∀ t, pslf k ( t ) = pslf k +1 ( t ) } is max t 0 ∈ T , ( s 1 ,...,s m ) ∈ L t 0 ℓ =1 parallelism of the VM; 8 ∀ k, ∀ t ≥ 0 , pslf k ( t ) − pslf k − 1 ( t ) ≥ pslf k +1 ( t ) − pslf k ( t ) (concavity) [explanation] pslf k ( t ) ≥ pslf k +1 ( t ) implies ∀ k, ∀ t ≥ 0 , [by induction] k k +1 � b � m 9 pslf ¯ m ( b − a ) ≤ k =1 s k ( t ) dt ≤ psuf ¯ m ( b − a ) a Component- Component- Based Based More properties Examples Software Software Design Design Let us assume that at some instant t ∗ we know that Enrico Bini Enrico Bini 1 pslf k ( t ) of a VM with ¯ m dedicated processors? pslf k ( t ∗ ) ≥ c ∗ , (1) Design Design 2 pslf k ( t ) of a VM which provides Q budget, every period problem problem From Lipschitz-continuity and (1), we fi nd P , with parallelism at most ¯ m ? Model of VM Model of VM 3 pslf k ( t ) of a VM which provides Q 1 = 4 , Q 2 = 2 budgets, 0 ≤ t ≤ t ∗ − c ∗ 0 k ∀ t ∈ [0 , t ∗ ] pslf k ( t ) ≥ on two CPUs, every period P = 6 ? c ∗ + k ( t − t ∗ ) t ∗ − c ∗ k < t ≤ t ∗ Let q and r be quotient and rest of the Euclidean division of any t ≥ 0 by t ∗ , that is t = qt ∗ + r, q ∈ N , r ∈ [0 , t ∗ ) . Then, for any t ≥ 0 , the following lower bound holds pslf k ( t ) = pslf k ( t ∗ + · · · + t ∗ + r ) ≥ q times + pslf k ( r ) = qc ∗ + pslf k ( r ) . ≥ pslf k ( t ∗ ) + · · · + pslf k ( t ∗ ) q times

Component- Component- Based Based Examples Is even budget always worst? Software Software Design Design If periods are not synchronized. . . ( P = 8 , Q 1 + Q 2 = 8 ) Enrico Bini Enrico Bini 1 pslf k ( t ) of a VM with ¯ m dedicated processors? Design Design pslf 2 ( t ) 2 pslf k ( t ) of a VM which provides Q budget, every period problem problem P , with parallelism at most ¯ m ? Model of VM Model of VM Q 1 = 8 3 pslf k ( t ) of a VM which provides Q 1 = 4 , Q 2 = 2 budgets, Q 1 = 7 Q 1 = 6 on two CPUs, every period P = 6 ? Q 1 = 5 Q 1 = 4 [Symmetric worst-case supply pattern (idea by Artem Burmyakov)] t 0 2 4 6 8 10 12 14 16 18 20 22 CPU1 CPU2 CPU1 CPU2 CPU1 CPU2 − 11 − 10 − 9 − 8 − 7 − 6 − 5 − 4 − 3 − 2 − 1 0 1 2 3 4 5 6 7 8 9 10 11 CPU1 CPU2 How does it compare against Q 1 = Q 2 = 3 or against Q 1 = 6 , CPU1 Q 2 = 0 ? CPU2