ece232 hardware organization and design
play

ECE232: Hardware Organization and Design Lecture 7: Binary Numbers - PowerPoint PPT Presentation

ECE232: Hardware Organization and Design Lecture 7: Binary Numbers and Adders Adapted from Computer Organization and Design , Patterson & Hennessy, UCB Computer Organization 5 classic components of any computer Computer Processor


  1. ECE232: Hardware Organization and Design Lecture 7: Binary Numbers and Adders Adapted from Computer Organization and Design , Patterson & Hennessy, UCB

  2. Computer Organization 5 classic components of any computer  Computer Processor Memory Devices (CPU) Input Control Datapath Output Today we will look at datapaths ( adder, multiplier, … )  ECE232: Adders 2

  3. Unsigned Binary Integers Given an n-bit number  x n-1 x 0        n 1 n 2 1 0  x x 2 x 2 x 2 x 2   n 1 n 2 1 0 Range: 0 to +2 n – 1  Example  • 0000 0000 0000 0000 0000 0000 0000 1011 2 = 0 + … + 1 ×2 3 + 0×2 2 +1×2 1 +1×2 0 = 0 + … + 8 + 0 + 2 + 1 = 11 10 Using 32 bits  • 0 to +4,294,967,295 ECE232: Adders 3

  4. 2 ’s -Complement Signed Integers Given an n-bit number  2’s comp. decimal binary x n-1 x 0 1000 -8         n 1 n 2 1 0 1001 -7  x x 2 x 2 x 2 x 2   n 1 n 2 1 0 1010 -6 1011 -5 Bit n-1 is sign bit  1100 -4 1/0 for negative/non-negative numbers • 1101 -3 Range: – 2 n – 1 to +2 n – 1 – 1 1110 -2  1111 -1 Example  0000 0 1111 1111 1111 1111 1111 1111 1111 1100 2  0001 1 = – 1×2 31 + 1×2 30 + … + 1 ×2 2 +0×2 1 +0×2 0 0010 2 = – 2,147,483,648 + 2,147,483,644 = – 4 10 0011 3 Using 32 bits  0100 4 – 2,147,483,648 to +2,147,483,647 • 0101 5 Most-negative: 1000 0000 … 0000 0110 6 • 0111 7 Most-positive: 0111 1111 … 1111 • ECE232: Adders 4

  5. Signed Negation To get – X complement X and add 1  • Complement means 1 → 0,     x x 1111...111 1 0 → 1 2    Example: negate +2 x 1 x  • +2 = 0000 0000 … 0010 2 • –2 = 1111 1111 … 1101 2 + 1 = 1111 1111 … 1110 2 Subtraction: y – x = y + (  x +1)  Representing a number using more bits  Sign Extension • Preserve the numeric value Replicate the sign bit to the left  Examples: 8-bit to 16-bit  • +5: 0000 0101 => 0000 0000 0000 0101 • – 5: 1111 1011 => 1111 1111 1111 1011 ECE232: Adders 5

  6. Overflow in 2’s Comp Add/Subtract (1) Example -  01001 9 11001 -7 1 00010 2 Carry-out discarded - does not indicate overflow In general, if X and Y have opposite signs - no overflow  can occur regardless of whether there is a carry-out or not Examples -  ECE232: Adders 6

  7. Overflow in 2’s Comp Add/Subtract (2) If X and Y have the same sign and result has different sign -  overflow occurs Examples -  10111 -9 10111 -9 1 01110 14 = -18 mod 32 • Carry-out and overflow 01001 9 00111 7 0 10000 -16 = 16 mod 32 • No carry-out but overflow ECE232: Adders 7

  8. Ripple Carry Adder  Addition • most frequent operation • used also for multiplication and division • fast two-operand adder essential  Simple parallel adder • for adding x n -1 , x n -2 ,..., x 0 and y n -1 , y n -2 ,…, y 0 • using n full adders  Full adder • combinational digital circuit with input bits x i , y i and incoming carry bit c i , producing output sum bit s i and outgoing carry bit c i +1 • incoming carry for next FA with input bits x i +1 , y i +1 • s i = x i  y i  c i • c i +1 = x i  y i + c i  ( x i + y i ) ECE232: Adders 8

  9. Full-Adder (FA) Examine the Full Adder table  Cin x y Cin Cout S x Cout 0 0 0 0 0 0 0 1 0 1  0 1 0 0 1 y 0 1 1 1 0 Sum 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 In general, for bit i : c i+1 = x i y i + c i (x i +y i ) Cout = x • y + Cin • (x + y) where c i+1 = Cout, c i = Cin S = x’y’c + x’yc’ + xy’c’ + xyc = x  y  c Half adder has 2 inputs. In principle HA is same as FA, with C in set to 0. ECE232: Adders 9

  10. Parallel Adder: Ripple Carry In a parallel arithmetic unit  All 2n input bits available at the same time • Carry propagates from the FA to the right to FA to the left • Carries ripple through all n FAs before we can claim that the • sum outputs are correct and may be used in further calculations Each FA has a finite delay  ECE232: Adders 10

  11. Example x3,x2,x1,x0=1111 • y3,y2,y1,y0=0001 •  FA - operation time - delay • Assuming equal delays for sum • and carry-out Longest carry propagation • chain when adding two 4-bit numbers In synchronous arithmetic units -  time allowed for adder's operation is worst-case delay - n  FA ECE232: Adders 11

  12. Subtraction using Ripple Carry Adder Suppose you are performing X-Y operation  Complement Y bits • Force C 0 to 1 • add • Example: X = 0101, Y = 0010; Compute X – Y  First step: Complement Y  1101 • Second step: add 0101 + 1101 + 1 = 0011  ECE232: Adders 12

  13. Carry Select Adder Principle: speculative  Carry propagate delay n-bit adder n-bit adder CP(2n) = 2*CP(n) CP(2n) = CP(n) + CP(mux) Compute both, select one n-bit adder n-bit adder n-bit adder 0 1 MUX Carry-select adder Cout ECE232: Adders 13

  14. Summary Implement hardware for performance  Ripple Carry: least hardware, slowest  Carry Select: even faster, even more hardware  Other techniques available, e.g., Carry skip adder  Combination of these techniques – hybrid adders  ECE232: Adders 14

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend