5DV118 Computer Organization and Architecture Ume University - - PowerPoint PPT Presentation

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5DV118 Computer Organization and Architecture Ume University - - PowerPoint PPT Presentation

5DV118 Computer Organization and Architecture Ume University Department of Computing Science Stephen J. Hegner Topic 3aux: Logic Design 5DV008 20151111 t:2C sl:1 Hegner UU A Ridiculously Brief Overview of Combinational Logic Design


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5DV008 20151111 t:2C sl:1 Hegner UU

5DV118 Computer Organization and Architecture Umeå University Department of Computing Science

Stephen J. Hegner

Topic 3aux: Logic Design

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5DV118 t3:aux sl:2 2013-11-13

A Ridiculously Brief Overview of Combinational Logic Design

  • These slides provide a brief overview of

combinational logic.

  • They are limited to the ideas absolutely needed

for the course.

  • For a more detailed presentation consult

Appendix B of the fifth edition of the course

  • text. (Appendix C on the CD-ROM of the fourth

edition).

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5DV118 t3:aux sl:3 2013-11-13

Types of Logic Circuits

  • Combinational logic is used to realize

memoryless functions.

  • Sequential logic is used to realize functions

which have an internal state.

  • These slides focus upon combinational logic.
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5DV118 t3:aux sl:4 2013-11-13

Basic Gates

A B C 1 1 1 1 1 A B C 1 1 1 1 1 1 1

The Inverter

A B 1 1

The AND gate The OR gate

A B 1 1 A B 1 1

The Buffer

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5DV118 t3:aux sl:5 2013-11-13

Further Gates

A B C 1 1 1 1 1 1 1 A B C 1 1 1 1 1 The XOR gate The NAND gate The NOR gate A B C 1 1 1 1 1 1

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5DV118 t3:aux sl:6 2013-11-13

Compact Representation of Negation

  • Negation may be represented as a circle on

another gate.

  • The following two circuits are equivalent.

A B C 1 1 1 1 1

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SLIDE 7

5DV118 t3:aux sl:7 2013-11-13

The Multiplexer

  • A multiplexer selects between two (or more)

inputs.

  • S is the select line.
  • Shown is a two-input multiplexer.
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A One-Bit Half Adder

A B S C 1 1 1 1 1 1 1

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A One-Bit Full Adder

A B Cin S Cout 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

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A Sequential Adder

  • An n-bit sequential adder may

be realized by gluing n one-bit full adders together.

  • This is not the best design

because the critical path is proportional to n.