Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework for Non for Non- for Non for Non- -Intrusive Monitoring of -Intrusive Monitoring of Intrusive Monitoring of Intrusive Monitoring of Complex Embedded Systems Complex Embedded Systems Complex Embedded Systems Complex Embedded Systems Roman Lysecky Roman Lysecky Roman Lysecky Roman Lysecky Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering University of Arizona University of Arizona University of Arizona University of Arizona University of Arizona University of Arizona University of Arizona University of Arizona rlysecky@ece.arizona.edu rlysecky@ece.arizona.edu rlysecky@ece.arizona.edu rlysecky@ece.arizona.edu Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan Embedded Systems Design Laboratory Embedded Systems Design Laboratory http://www.ece.arizona.edu/~embedded http://www.ece.arizona.edu/~embedded
Introduction Introduction - - Software Observability Software Observability Software Observability Software Observability d dynamic instrumentation of software systems dynamic instrumentation of software systems d i i i i i i f f f f DTrace [Solaris] DTrace [Solaris] SystemTap [Linux] SystemTap [Linux] µP µP µP µP µP µP no overhead when not enabled no overhead when not enabled software probes can monitor more than just software probes can monitor more than just instruction addresses instruction addresses ... ... HW0 HW0 HW0 HW0 HW1 HW1 HWn HWn secure execution of designer specified secure execution of designer specified instrumentation code instrumentation code H How we provide similar capabilities at How we provide similar capabilities at H id id i i il il biliti biliti t t the hardware and system levels? the hardware and system levels?
Introduction Introduction - - Goals of System Observability Goals of System Observability Goals of System Observability Goals of System Observability 1. 1. monitor execution behavior of hardware circuit monitor execution behavior of hardware circuit arbitrary events, registers, or computational arbitrary events, registers, or computational components components µP µP µP µP µP µP as non- as non as non as non- -intrusive as possible -intrusive as possible intrusive as possible intrusive as possible 2. 2. provide support for various types of hardware provide support for various types of hardware monitors – monitors – referred to as event probes referred to as event probes e.g., event probes, event and data probes e.g., event probes, event and data probes ... ... HW0 HW0 HW0 HW0 HW1 HW1 HWn HWn 3. 3. allow arbitrary designer- allow arbitrary designer -defined software probe defined software probe monitor in response to hardware probes monitor in response to hardware probes 4. 4. provide integrated monitoring of software and provide integrated monitoring of software and hardware components hardware components hardware components hardware components integration of software event probes integration of software event probes within within single environment single environment 5. 5. 5. 5. NON INTRUSIVE NON NON-INTRUSIVE NON INTRUSIVE INTRUSIVE should not impact/perturb the performance should not impact/perturb the performance of the system of the system
Traditional/Existing Hardware Monitoring Traditional/Existing Hardware Monitoring - - JTAG JTAG JTAG Scan Chain Hardware JTAG Scan Chain Hardware Software Software HW HW Application Application Monitoring Monitoring Analysis Analysis Analysis Analysis (C/C++) (C/C++) Support SW Support SW pp pp Scan chains typically built Scan chains typically built- -in into ICs in into ICs Could be utilized for dynamic analysis, but incurs Could be utilized for dynamic analysis, but incurs µP µP µP µP µP µP significant overhead significant overhead Pros Pros readily available without additional hardware readily available without additional hardware Cons Cons TAG TAG HW HW JT JT interrupts HW execution to scan all/selected interrupts HW execution to scan all/selected registers registers must be periodically performed to detect must be periodically performed to detect events events [Leatherman and Stollen, IEEE Potentials 2005] [Leatherman and Stollen, IEEE Potentials 2005] [Leatherman and Stollen, IEEE Potentials 2005] [Leatherman and Stollen, IEEE Potentials 2005] HW execution is HW execution is Must periodically scan to Must periodically scan to interrupted interrupted detect changes detect changes HW Execution HW Execution HW Execution HW Execution JTAG Scanning of All Registers JTAG Scanning of All Registers SW Analysis of Scan SW Analysis of Scan JTAG Scanning … JTAG Scanning … JTAG scan requires 10’s of milliseconds JTAG scan requires 10’s of milliseconds
Traditional/Existing Hardware Monitoring Traditional/Existing Hardware Monitoring - - Export to IOs Export to IOs IO Access to Internal Registers IO Access to Internal Registers Software Software HW HW Application Application Monitoring Monitoring (C/C++) (C/C++) Support SW Support SW pp pp internal registers/signals of interest can be internal registers/signals of interest can be i t i t l l i t i t / i / i l l f i t f i t t t b b connected to pins at boundaries of HW circuit connected to pins at boundaries of HW circuit pros pros µP µP µP µP µP µP does not interrupt HW execution does not interrupt HW execution does not interrupt HW execution does not interrupt HW execution readily available without additional hardware readily available without additional hardware cons cons wires wires – additional wires needed to connect wires wires additional wires needed to connect additional wires needed to connect additional wires needed to connect HW HW internal registers internal registers can impact area, delay, power, and cost can impact area, delay, power, and cost of circuit of circuit SW must continuously monitor registers to SW must continuously monitor registers to detect events detect events [Abramovic et al., DAC 2006 ] [Abramovic et al., DAC 2006 ] [Vermeulen and Goel IEEE Design&Test 2002] [Vermeulen and Goel IEEE Design&Test 2002] [Vermeulen and Goel, IEEE Design&Test 2002] [Vermeulen and Goel, IEEE Design&Test 2002] [Shutlz et al., CF 2007] [Shutlz et al., CF 2007]
Traditional/Existing Hardware Monitoring - Traditional/Existing Hardware Monitoring - Assertions Assertions Dynamic Assertion Checkers Dynamic Assertion Checkers Software Software HW HW Application Application Monitoring Monitoring (C/C++) (C/C++) Support SW Support SW pp pp Automatically synthesize assertion checkers from Automatically synthesize assertion checkers from Automatically synthesize assertion checkers from Automatically synthesize assertion checkers from specification used for validation/verification specification used for validation/verification Property Specification Language (PSL) commonly used Property Specification Language (PSL) commonly used for specifying assertions for specifying assertions µP µP µP µP pros pros pros pros automated tools for creating hardware checkers automated tools for creating hardware checkers can be used for dynamic assertion testing can be used for dynamic assertion testing Dynamic Dynamic hardware for assertion closely integrated with logic hardware for assertion closely integrated with logic Assertion Assertion o HW HW Checkers Checkers cons cons only indicates occurrence of assertion, no support for only indicates occurrence of assertion, no support for events or data capture events or data capture requires additional support for online monitoring requires additional support for online monitoring q q pp pp g g PSL [Accellera, 2004] PSL [Accellera, 2004] FoCs [Abardanel et al., CAV 2000] FoCs [Abardanel et al., CAV 2000] [Borrionne et al., FDL 2005] [Borrionne et al., FDL 2005] [Morin [Morin- -Allory et al., 2008] Allory et al., 2008] [Boulé and Zilic, ACM TODAES 2008] [Boulé and Zilic, ACM TODAES 2008] 4
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