Hardware Observability Framework Hardware Observability Framework - - PowerPoint PPT Presentation

Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework Hardware Observability Framework for Non for Non-

• Intrusive Monitoring of

Intrusive Monitoring of Hardware Observability Framework Hardware Observability Framework for Non for Non-

• Intrusive Monitoring of

Intrusive Monitoring of Complex Embedded Systems Complex Embedded Systems Complex Embedded Systems Complex Embedded Systems

Roman Lysecky Roman Lysecky

Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering University of Arizona University of Arizona

Roman Lysecky Roman Lysecky

Department of Electrical and Computer Engineering Department of Electrical and Computer Engineering University of Arizona University of Arizona University of Arizona University of Arizona

rlysecky@ece.arizona.edu rlysecky@ece.arizona.edu

Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan

University of Arizona University of Arizona

rlysecky@ece.arizona.edu rlysecky@ece.arizona.edu

Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan Students: Jong Chul Lee, Sachi Mahadevan

Embedded Systems Design Laboratory Embedded Systems Design Laboratory

http://www.ece.arizona.edu/~embedded http://www.ece.arizona.edu/~embedded

Introduction Introduction -

• Software Observability

Software Observability

Software Observability Software Observability

d i i i f f d i i i f f dynamic instrumentation of software systems dynamic instrumentation of software systems DTrace [Solaris] DTrace [Solaris] SystemTap [Linux] SystemTap [Linux]

µP µP µP µP µP µP

no overhead when not enabled no overhead when not enabled software probes can monitor more than just software probes can monitor more than just instruction addresses instruction addresses

HW0 HW0 HW1 HW1 HWn HWn ... ...

secure execution of designer specified secure execution of designer specified instrumentation code instrumentation code

H id i il biliti t H id i il biliti t

HW0 HW0

How we provide similar capabilities at How we provide similar capabilities at the hardware and system levels? the hardware and system levels?

Introduction Introduction -

• Goals of System Observability

Goals of System Observability

Goals of System Observability Goals of System Observability

1. 1. monitor execution behavior of hardware circuit monitor execution behavior of hardware circuit arbitrary events, registers, or computational arbitrary events, registers, or computational components components as non as non-

• intrusive as possible

intrusive as possible

µP µP µP µP µP µP

as non as non-

• intrusive as possible

intrusive as possible 2. 2. provide support for various types of hardware provide support for various types of hardware monitors monitors – – referred to as event probes referred to as event probes e.g., event probes, event and data probes e.g., event probes, event and data probes

HW0 HW0 HW1 HW1 HWn HWn ... ...

3. 3. allow arbitrary designer allow arbitrary designer-

• defined software probe

defined software probe monitor in response to hardware probes monitor in response to hardware probes 4. 4. provide integrated monitoring of software and provide integrated monitoring of software and hardware components hardware components

HW0 HW0

hardware components hardware components integration of integration of software event probes software event probes within within single environment single environment 5. 5. NON NON-INTRUSIVE INTRUSIVE 5. 5. NON NON INTRUSIVE INTRUSIVE should not impact/perturb the performance should not impact/perturb the performance

• f the system
• f the system

Traditional/Existing Hardware Monitoring Traditional/Existing Hardware Monitoring -

• JTAG

JTAG

Software Software Application Application (C/C++) (C/C++) HW HW Monitoring Monitoring Support SW Support SW

JTAG Scan Chain Hardware JTAG Scan Chain Hardware Analysis Analysis

µP µP µP µP µP µP

pp pp

Analysis Analysis

Scan chains typically built Scan chains typically built-

• in into ICs

in into ICs Could be utilized for dynamic analysis, but incurs Could be utilized for dynamic analysis, but incurs significant overhead significant overhead

HW HW

Pros Pros readily available without additional hardware readily available without additional hardware Cons Cons

TAG TAG

interrupts HW execution to scan all/selected interrupts HW execution to scan all/selected registers registers must be periodically performed to detect must be periodically performed to detect events events [Leatherman and Stollen, IEEE Potentials 2005] [Leatherman and Stollen, IEEE Potentials 2005]

JT JT

HW execution is HW execution is interrupted interrupted Must periodically scan to Must periodically scan to detect changes detect changes

[Leatherman and Stollen, IEEE Potentials 2005] [Leatherman and Stollen, IEEE Potentials 2005]

HW Execution HW Execution JTAG Scanning of All Registers JTAG Scanning of All Registers HW Execution HW Execution SW Analysis of Scan SW Analysis of Scan JTAG Scanning … JTAG Scanning …

JTAG scan requires 10’s of milliseconds JTAG scan requires 10’s of milliseconds

Traditional/Existing Hardware Monitoring Traditional/Existing Hardware Monitoring -

• Export to IOs

Export to IOs

Software Software Application Application (C/C++) (C/C++) HW HW Monitoring Monitoring Support SW Support SW

IO Access to Internal Registers IO Access to Internal Registers

i t l i t / i l f i t t b i t l i t / i l f i t t b

µP µP µP µP µP µP

pp pp

internal registers/signals of interest can be internal registers/signals of interest can be connected to pins at boundaries of HW circuit connected to pins at boundaries of HW circuit pros pros does not interrupt HW execution does not interrupt HW execution does not interrupt HW execution does not interrupt HW execution readily available without additional hardware readily available without additional hardware cons cons wires wires – additional wires needed to connect additional wires needed to connect

HW HW

wires wires additional wires needed to connect additional wires needed to connect internal registers internal registers can impact area, delay, power, and cost can impact area, delay, power, and cost

• f circuit
• f circuit

SW must continuously monitor registers to SW must continuously monitor registers to detect events detect events [Abramovic et al., DAC 2006 ] [Abramovic et al., DAC 2006 ] [Vermeulen and Goel IEEE Design&Test 2002] [Vermeulen and Goel IEEE Design&Test 2002] [Vermeulen and Goel, IEEE Design&Test 2002] [Vermeulen and Goel, IEEE Design&Test 2002] [Shutlz et al., CF 2007] [Shutlz et al., CF 2007]

Traditional/Existing Hardware Monitoring Traditional/Existing Hardware Monitoring -

• Assertions

Assertions

Software Software Application Application (C/C++) (C/C++)

Dynamic Assertion Checkers Dynamic Assertion Checkers

Automatically synthesize assertion checkers from Automatically synthesize assertion checkers from

HW HW Monitoring Monitoring Support SW Support SW

µP µP

Automatically synthesize assertion checkers from Automatically synthesize assertion checkers from specification used for validation/verification specification used for validation/verification Property Specification Language (PSL) commonly used Property Specification Language (PSL) commonly used for specifying assertions for specifying assertions pros pros

µP µP

pp pp

Dynamic Dynamic Assertion Assertion

pros pros automated tools for creating hardware checkers automated tools for creating hardware checkers can be used for dynamic assertion testing can be used for dynamic assertion testing hardware for assertion closely integrated with logic hardware for assertion closely integrated with logic

HW HW

• Checkers

Checkers

cons cons

• nly indicates occurrence of assertion, no support for
• nly indicates occurrence of assertion, no support for

events or data capture events or data capture requires additional support for online monitoring requires additional support for online monitoring q pp g q pp g PSL [Accellera, 2004] PSL [Accellera, 2004] FoCs [Abardanel et al., CAV 2000] FoCs [Abardanel et al., CAV 2000] [Borrionne et al., FDL 2005] [Borrionne et al., FDL 2005]

4

[Morin [Morin-

• Allory et al., 2008]

Allory et al., 2008] [Boulé and Zilic, ACM TODAES 2008] [Boulé and Zilic, ACM TODAES 2008]

Hardware Observability Hardware Observability

Software Software Application Application (C/C++) (C/C++)

Hardware/System Observability Hardware/System Observability

hardware probes inserted directly into hardware to hardware probes inserted directly into hardware to µP µP µP µP µP µP hardware probes inserted directly into hardware to hardware probes inserted directly into hardware to detect probe events detect probe events

• bservability engine performs all interfacing with
• bservability engine performs all interfacing with

hardware probes and triggers designer hardware probes and triggers designer-

• defined SW

defined SW code if enabled code if enabled code if enabled code if enabled pros pros does not interrupt HW execution does not interrupt HW execution event event-driven driven HW monitoring HW monitoring – i.e. no i.e. no

Observ Observ-

• ability

ability Engine Engine HW HW

software software probe probe monitors monitors

g unnecessary polling or periodic scanning unnecessary polling or periodic scanning minimal impact on hardware circuit minimal impact on hardware circuit cons cons i t f b bilit i i t f b bilit i

Engine Engine

HW E i HW E i

Hardware analysis is triggered Hardware analysis is triggered by designer by designer-

• defined probes

defined probes

area requirements of observability engine area requirements of observability engine

Analysis can be disabled for Analysis can be disabled for HW probes HW probes 5

HW Execution HW Execution HW Probe/SW Analysis HW Probe/SW Analysis HW Probe HW Probe

Hardware Observability Hardware Observability

µP µP

Hardware Hardware

IP IP system bus system bus IP IP IP IP

Observability Observability Framework Framework

HWOB HWOB

HWOI HWOI HWOI HWOI HWOI HWOI

Framework Framework

hardware observability hardware observability interface (HWOI) interface (HWOI)

HWOBridge

HWOIntr HWOIntr

HWOBus HWOBus

( ) ( ) interface to individual interface to individual hardware IP cores hardware IP cores

HWOEngine µP µP RAM RAM

monitors internal monitors internal signals to detect signals to detect hardware event probes hardware event probes

8

hardware event probes hardware event probes tracks hardware event tracks hardware event probes, timing, and probes, timing, and

Hardware Observability Hardware Observability

µP µP

Hardware Hardware

IP IP system bus system bus IP IP IP IP

Observability Observability Framework Framework

HWOB HWOB

HWOI HWOI HWOI HWOI HWOI HWOI

Framework Framework

hardware observability hardware observability bus (HWOBus) bus (HWOBus)

HWOBridge

HWOIntr HWOIntr

HWOBus HWOBus

( ) ( ) dedicated bus for dedicated bus for hardware observability hardware observability it i it i

HWOEngine µP µP RAM RAM

monitoring monitoring allows for observations allows for observations without affecting without affecting

8

without affecting without affecting system bus system bus

• ptional hardware
• ptional hardware

Hardware Observability Hardware Observability

µP µP

Hardware Hardware

IP IP system bus system bus IP IP IP IP

Observability Observability Framework Framework

HWOB HWOB

HWOI HWOI HWOI HWOI HWOI HWOI

Framework Framework

hardware observability hardware observability engine (HWOEngine) engine (HWOEngine)

HWOBridge

HWOIntr HWOIntr

HWOBus HWOBus

g ( g ) g ( g ) implements designer implements designer-

• specified software

specified software b it b it

HWOEngine µP µP RAM RAM

probe monitors probe monitors APIs defined for basic APIs defined for basic hardware probe hardware probe

8

hardware probe hardware probe configuration and event configuration and event processing processing

Hardware Observability Hardware Observability

+0: hwoi_eventflags HWOIntr_out probe_data probe_event HWOIntr_in

Hardware Event Hardware Event

_ g +4: hwoi_eventmask +8: hwoi_ep0_ts +12: hwoi_ep0_data +16: hwoi ep1 ts HEP0

Probes (HEPs) Probes (HEPs)

designer designer-defined defined

+16: hwoi_ep1_ts +20: hwoi_ep1_data HEP1

designer designer defined defined hardware event hardware event probes (HEPs) are probes (HEPs) are integrated within HW integrated within HW

+120: hwoi_ep31_ts +124: hwoi_ep31_data HEP31

HWOI_TS

integrated within HW integrated within HW components components HEPs point defines HEPs point defines HEPs point defines HEPs point defines an event or register an event or register that a designer would that a designer would like to monitor like to monitor

8

like to monitor like to monitor

Hardware Observability Hardware Observability

+0: hwoi_eventflags HWOIntr_out probe_data probe_event HWOIntr_in

Hardware Hardware

_ g +4: hwoi_eventmask +8: hwoi_ep0_ts +12: hwoi_ep0_data +16: hwoi ep1 ts HEP0

Observability Observability Interface Interface

+16: hwoi_ep1_ts +20: hwoi_ep1_data HEP1

Interface Interface (HWOI) (HWOI)

eventflags register eventflags register

+120: hwoi_ep31_ts +124: hwoi_ep31_data HEP31

HWOI_TS

eventflags register eventflags register stores status of all stores status of all hardware event hardware event hardware event hardware event probes probes eventmask register eventmask register

8

enables/disables enables/disables firing of hardware firing of hardware t b t b

Hardware Observability Hardware Observability

31 1 31 1 hwoi eventmask: hwoi_eventflags: HWOIntr out probe data probe event HWOIntr in hwoi_eventmask: +0: hwoi_eventflags +4: hwoi_eventmask HWOIntr_out probe_data probe_event HWOIntr_in HWOIntr +8: hwoi_ep0_ts +12: hwoi_ep0_data +16: hwoi_ep1_ts +20: hwoi_ep1_data HEP0 HEP1

Hardware Hardware Observability Observability

+120: hwoi_ep31_ts HEP

y Interface Interface (HWOI) (HWOI)

8 +124: hwoi_ep31_data HEP31

HWOI_TS

(HWOI) (HWOI)

interrupt is generated interrupt is generated whenever at least one whenever at least one

Hardware Observability Hardware Observability

epN_cond / hwoi_epN_ts <= HWOI_TS (optional) hwoi_epN_data <= probe_data (optional) epN_cond / hwoi_epN_ts <= HWOI_TS (optional) hwoi_epN_data <= probe_data (optional) HWOIntr out probe data probe event HWOIntr in epN_cond’ epN_cond’ hwoi epN rst hwoi epN rst hwoi_epN_rst’ hwoi_epN_rst’ EP_ EV EP_ EV EP_ NE EP_ NE +0: hwoi_eventflags +4: hwoi_eventmask HWOIntr_out probe_data probe_event HWOIntr_in _ p _ _ p _ h +8: hwoi_ep0_ts +12: hwoi_ep0_data +16: hwoi_ep1_ts +20: hwoi_ep1_data HEP0 HEP1

Hardware Hardware Observability Observability

+120: hwoi_ep31_ts HEP

y Interface Interface (HWOI) (HWOI)

8 +124: hwoi_ep31_data HEP31

HWOI_TS

(HWOI) (HWOI)

state state-

• based definition

based definition

• f HEP with blocking
• f HEP with blocking

Experimental Setup Experimental Setup Experimental System Experimental System Configuration Configuration

goal goal: evaluate hardware : evaluate hardware

µP µP

goal goal: evaluate hardware : evaluate hardware

• bservability for monitoring
• bservability for monitoring

system bus performance and system bus performance and

• verflow conditions
• verflow conditions

FIR FIR P1 ... ... Pn HWOI HWOI HWOI HWOI HWOI HWOI

• verflow conditions
• verflow conditions

single core microprocessor single core microprocessor system with several hardware system with several hardware

Observ Observ-

• ability

ability Engine Engine

system with several hardware system with several hardware coprocessors and common coprocessors and common peripherals peripherals

8

FIR coprocessor: 13 FIR coprocessor: 13-

• tap fixed

tap fixed point finite impulse response point finite impulse response filter filter

Experimental Setup Experimental Setup Experimental System Experimental System

hardware event probes hardware event probes FIR computational overflow FIR computational overflow

µP µP

p bus transaction initiation bus transaction initiation bus transaction acknowledge bus transaction acknowledge

FIR FIR P1 ... ... Pn HWOI HWOI HWOI HWOI HWOI HWOI

bus transaction acknowledge bus transaction acknowledge (granting access to bus to (granting access to bus to coprocessor) coprocessor)

Observ Observ-

• ability

ability Engine Engine

bus transaction completion bus transaction completion

8

• SW probe monitors

SW probe monitors

• report overflow condition for

report overflow condition for

Experimental Results Experimental Results -

• Case Study

Case Study

e n Wait Time n Wait Time n Wait Time n Wait Time Transaction Transaction Transaction Transaction

effects of bus priority effects of bus priority between hardware IP between hardware IP cores cores

Burst Transaction Period (cycles) Burst Transaction Period (cycles) Burst Transaction Period (cycles) Burst Transaction Period (cycles) Bus Bus Bus Bus

effects of overlapping bus transactions, effects of overlapping bus transactions, cache writebacks, and peripheral cache writebacks, and peripheral execution execution

8

execution execution

Experimental Results Experimental Results -

• Area

Area (LUTs+FFs) (LUTs+FFs) (LUTs+FFs) (LUTs+FFs)

Hardware Event Probes Hardware Event Probes Hardware Event Probes Hardware Event Probes

8

Hardware Event Probes Hardware Event Probes Hardware Event Probes Hardware Event Probes

Experimental Results Experimental Results -

• Comparison

Comparison with PSL Assertion Checkers with PSL Assertion Checkers PSL Specification for Asserts (nearest equivalent to HEPs)assert (cap input > equivalent to HEPs)assert (cap_input >

trig_value) @rising_edge(Clk);assert (p0_rd_req -> next_a [0 to 10] (p0_rd_rdy)) @rising_edge(Clk);...assert (p _ _ y)) @ g_ g ( ) (p0_rd_req -> next_a [2 to 3] (p0_burst_done)) @rising_edge(Clk);

µP µP

HW HW Dynamic Dynamic Assertion Assertion Checkers Checkers 8

Current Work Current Work -

• System Observability

System Observability

µP µP

ce/De ce/De ug ug

µP µP

ce/De ce/De ug ug

Integration of Integration of

µP µP

Trac Trac b

µP µP

Trac Trac b

hardware & hardware & software software

HWOI HWOI HWOI HWOI HWOI HWOI

IP IP IP IP

HWOI HWOI

• bservability
• bservability

use real use real time time

HWOBridge

HWOIntr HWOIntr

HWOBus HWOBus

use real use real-time time trace/debug ports trace/debug ports provided by many provided by many

HWOEngine µP µP RAM RAM

processors processors developing HWOI for developing HWOI for ft li ti ft li ti

8

software applications software applications

Future Work Future Work -

• Are we there yet...No!

Are we there yet...No! developing extensions to existing developing extensions to existing p g g p g g formal specification for defining formal specification for defining event probes event probes -

• build upon existing

build upon existing methods methods property specification languages (PSL)

8

(PSL) di t t i l ti / d li

Th k Th k Thanks. Thanks.

8

Embedded Systems Design Laboratory Embedded Systems Design Laboratory

http://www.ece.arizona.edu/~embedded http://www.ece.arizona.edu/~embedded