Di Digi gital tal Ci Circui cuits ts ECS S 371 Dr. Prapun - - PowerPoint PPT Presentation
Di Digi gital tal Ci Circui cuits ts ECS S 371 Dr. Prapun Suksompong prapun@siit.tu.ac.th Lecture 10 Office Hours: BKD 3601-7 Monday 9:00-10:30, 1:30-3:30 Tuesday 10:30-11:30 1 Announcement HW4 posted on the course web site
prapun@siit.tu.ac.th
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ECS S 371
Office Hours: BKD 3601-7 Monday 9:00-10:30, 1:30-3:30 Tuesday 10:30-11:30
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HW4 posted on the course web site
Chapter 5: 4(b,c,e), 20a, 22a, 56 Write down all the steps that you have done to obtain your
answers.
Due date: July 16, 2009 (Thursday)
There will be a quiz today.
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NAND gate is a universal gate. NOR gate is a universal gate.
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NAND gates are sometimes called universal gates because they can be used to produce the other basic Boolean functions. Inverter
A A
AND gate
A B AB A B A + B
OR gate
A B A + B
NOR gate
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Implement the following logic circuit using only NAND gates:
Solution:
Negative-OR NAND
C C C
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Implement the following logic circuit using only NAND gates:
Solution:
It is easy to turn AND-OR configuration into a NAND- gate-only circuit Negative-OR NAND
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NOR gates are also universal gates and can form all of the basic gates.
Inverter
A A
OR gate
A B A + B A B AB
AND gate
A B AB
NAND gate
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Implement the following logic circuit using only NOR gates:
Solution:
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We studied the theoretical principles used in
combinational logic design.
We will build on that foundation and describe many of the
devices, structures, and methods used by engineers to solve practical digital design problems.
A complex circuit or system is conceived as a collection of
smaller subsystems, each of which has a much simpler description.
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A digital system is an arrangement
logic functions connected to perform a specified
produce a defined
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There are several straightforward structures that turn up
quite regularly as building blocks in larger systems.
Encoder Decoders Comparators Multiplexers
Where can we find these building blocks?
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An integrated circuit (IC) is an electronic circuit that is
constructed entirely on a single small chip of silicon.
Two broad categories of digital ICs.
1.
Fixed-function logic
2.
Programmable logic
In fixed-function logic, the logic functions are set by the
manufacturer and cannot be changed.
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Cutaway view of DIP (Dual-In-line Pins) chip
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Fixed-function digital lCs are classified according to their complexity.
Small-scale integration (SSI)
up to ten equivalent gate circuits on a single chip basic gates and flip-flops.
Medium-scale integration (MSI)
from 10 to 100 equivalent gates on a chip. encoders, decoders, counters, registers, multiplexers, arithmetic
circuits, small memories
Large-scale integration (LSI) Very large-scale integration (VLSI) Ultra large-scale integration (ULSI)
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74x00
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For the next couple lectures, we will study most of these 74-series MSI.
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D E C O D E R C D B A G 1N G 2N O 0N O 12N O 15N O 10N O 11N O 1N O 13N O 14N O 4N O 3N O 2N O 7N O 6N O 5N O 9N O 8N
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in s t
BCD TO DEC
D B C A O 7N O 8N O 9N O 0N O 3N O 2N O 1N O 6N O 5N O 4N
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inst1
B C D T O 7S E G LT N B C D R B I N B I N A OB OC OE OD OF OG OA R B O N
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inst2
C O M P AR AT O R A3 B2 A2 AE B I AG B I ALB I A0 B0 B3 A1 B1 ALB O AG B O AE B O
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inst3
3:8 D E C O D E R A B G1 C G 2AN G 2B N Y0N Y1N Y2N Y3N Y4N Y5N Y6N Y7N
74138
inst4
2:4 D E C O D E R A1 A2 B1 B2 G 1N G 2N Y10N Y20N Y13N Y12N Y11N Y21N Y22N Y23N
74139
inst5
E N C O D E R 1N 2N 3N 6N 5N 4N 9N 8N 7N CN BN AN DN
74147
inst6
E N C O D E R 5N 0N 1N 2N 3N 4N E I N 6N 7N A1N A0N A2N E O N G S N
74148
inst7
M U LT I P LE X E R GN C B A D5 D0 D1 D4 D3 D2 D6 D7 Y WN
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inst8
M U LT I P LE X E R A1 B1 S E L B2 A3 B3 A2 B4 GN A4 Y2 Y1 Y4 Y3
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inst9
P AR I T Y G E N . B A F E D I C G H E VE N O D D
74280
inst10
4 B I T AD D E R C I N A1 A2 B2 A3 A4 B4 B1 B3 S U M 4 C O U T S U M 1 S U M 2 S U M 3
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inst11
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A decoder is a logic circuit that detects the presence of a specific combination of bits at its input. Two simple decoders that detect the presence of the binary code 0011 are shown below. The first has an active HIGH output; the second has an active LOW output.
A1 A0 A2 A3
X
Active HIGH decoder for 0011 A1 A0 A2 A3
X
Active LOW decoder for 0011
(A0 is the LSB and A3 is the MSB)
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Assume the output of the decoder shown below is a logic 1. What are the inputs to the decoder?
A0 = 0 A1 = 1 A2 = 0 A3 = 1 1
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The binary-to-decimal decoder shown here has 16 outputs –
Bin/Dec A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 4-bit binary input Decimal
A1 A2 A3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
The bubbles indicate active- LOW outputs.
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Decoder can be used in
computers for input/output selection.
Computers communicate
with peripherals by sending and/or receiving data through what is known as input/output (I/O) ports.
A decoder can be used to
select the I/O port so that data can be sent or received from a specific external device.
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2-to-4 line decoder with enable input
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Find the truth table of the 1-to-2 line decoder below. Then, implement the 1-to-2 line decoder.
I Y0 Y1
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Two independent 2:4 decoders The outputs and the enable (E) input are active-LOW
.
When E is HIGH all outputs are forced HIGH. E
3
O
Most MSI decoders were originally designed with active- LOW output. Notice that all of the signal names inside the symbol
active-LOW inputs and outputs.
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This is a usual 2:4 decoder. Active- LOW Enable Active-LOW output because NAND gates are used instead of AND gates
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Construct a 3-to-8 decoder from two 2-to-4 decoders
Low order bits (A1, A0) select within decoders. High order bit (A2) controls which decoder is active. How can we add an active-HIGH enable input? Notice that this part is equivalent to a 1:2 decoder.
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To construct (k+n)-to-2n+k decoders, can use
1.
2n of k-to-2k decoders with enable input and
2.
The connections are:
For each of the k-to-2k decoder with enable input,
all have k input we put in A0…Ak-1.
The enable line of the rthdecoder is connected to Dr of the n-to-2n
decoders.
The inputs of the n-to-2n decoder get Ak to An+k-1.
Basically, each k-to-2k decoder works on the last k bits. We use the first n bit, via the n-to-2n decoder, to select which one
(and only one) of the k-to-2k decoders will be enabled.
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Construct a 4:16 decoder with an active-LOW enable from three 2:4 decoders.
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Active-LOW outputs Three enable inputs.
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Construct a 4:16 decoder with an active-LOW enable (EN) from two 74x138 decoder.
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Construct a 5:32 decoder with two active- low enable and one active-high enable from four 74x138 and
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DECODER C D B A G1N G2N O0N O12N O15N O10N O11N O1N O13N O14N O4N O3N O2N O7N O6N O5N O9N O8N
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inst
Include two active-LOW chip select (CS) lines which must be at the active level to enable the outputs. These lines can be used to expand the decoder to larger inputs.
Alternative logic symbol
A LOW level on each chip select input is required to make the enable gate output (EN) HIGH.
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Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n-line decoder and m OR gate
Observe that the 3:8 decoder generates all possible minterms.
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Implement a full adder circuit with a decoder and OR gates
S = X,Y,Z(1,2,4,7) C = X,Y,Z (3,5,6,7)
Outputs Inputs A B C
S C
in
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
X Y Z
S C
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In general, a decoder converts coded information, such as binary number, into non-coded form. Later, (if time permitted) we will talk about