CS 31: Intro to Systems Digital Logic Martin Gagn Swarthmore - - PowerPoint PPT Presentation

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CS 31: Intro to Systems Digital Logic Martin Gagn Swarthmore - - PowerPoint PPT Presentation

CS 31: Intro to Systems Digital Logic Martin Gagn Swarthmore College January 31, 2017 Youre going to want scratch papr today borrow some if needed. Quick Announcements Late Policy Reminder 3 late days total for the whole


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SLIDE 1

CS 31: Intro to Systems Digital Logic

Martin Gagné Swarthmore College January 31, 2017

You’re going to want scratch papr today … borrow some if needed.

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SLIDE 2

Quick Announcements

  • Late Policy Reminder
  • 3 late days total for the whole semester
  • Lab work
  • Start early, especially multi-week labs
  • Readings
  • Only the page linked, no further links
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SLIDE 3

Today (and Thursday)

  • Hardware basics
  • Machine memory models
  • Digital signals
  • Logic gates
  • Manipulating/Representing values in hardware
  • Adders
  • Storage & memory (latches)
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SLIDE 4

The system stack

c program compiler shell

  • perating system

memory CPU circuits gates transistors wires software hardware electrical engineering This class Starting this week

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SLIDE 5

Hardware Models (1940’s)

  • Harvard Architecture:
  • Von Neumann Architecture:

Program Memory Input/Output Data Memory CPU (Control and Arithmetic) CPU (Control and Arithmetic) Input/Output Program and Data Memory

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SLIDE 6

Von Neumann Architecture Model

  • Computer is a generic computing machine:
  • Based on Alan Turing’s Universal Turing Machine
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SLIDE 7

Von Neumann Architecture Model

  • Computer is a generic computing machine:
  • Based on Alan Turing’s Universal Turing Machine

➔ The hardware only ever executes one program:

Initialize program counter Repeat forever: { fetch instruction indicated by program counter increment the program counter execute the instruction }

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SLIDE 8

Von Neumann Architecture Model

  • Computer is a generic computing machine:
  • Based on Alan Turing’s Universal Turing Machine
  • Stored program model: computer stores program rather

than encoding it (feed in data and instructions)

  • No distinction between data and instructions memory
  • 5 parts connected by buses (wires):
  • Memory, Control, Processing, Input, Output

Memory Cntrl Unit | Processing Unit cntrl bus addr bus data bus Input/Output

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SLIDE 9

Memory

  • Stores instructions and data.
  • Addressable, like array indices.
  • addr 0, 1, 2, …

(In CPU:)

  • Memory Address Register: address to read/write
  • Memory Data Register: value to read/write

Memory Cntrl Unit | Processing Unit cntrl bus addr bus data bus Input/Output

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SLIDE 10

Central Processing Unit (CPU)

  • Processing Unit: executes instructions selected by the

control unit

  • ALU (arithmetic logic unit): simple functional units: ADD,

SUB, AND, OR, etc.

  • Registers: temporary storage directly accessible by

instructions

  • Control unit: determines the order in which

instructions execute

  • PC: program counter: address of next instruction
  • IR: instruction register: holds current instruction
  • clock-based control: clock signal+IR trigger state changes
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SLIDE 11

Input/Output

  • Keyboard
  • Files on the hard drive
  • Network communication

Memory Cntrl Unit | Processing Unit cntrl bus addr bus data bus Input/Output

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SLIDE 12

Digital Computers

  • All input is discrete (driven by periodic clock)
  • All signals are binary (0: no voltage, 1: voltage)

data, instructions, control signals, arithmetic, clock

  • To run program, need different types of circuits

CPU ALU, Cntrl, Storage RAM Cntrl & Storage

bus Circuits to store program data and instructions and support reading and writing addressable storage locations Circuits to execute program instructions that act on program data

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SLIDE 13

Goal: Build a CPU (model)

Three main classifications of HW circuits: 1. ALU: implement arithmetic & logic functionality

(ex) adder to add two values together

2. Storage: to store binary values

(ex) Register File: set of CPU registers, Also: main memory (RAM)

3. Control: support/coordinate instruction execution

(ex) fetch the next instruction to execute

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SLIDE 14

Abstraction

User / Programmer Wants low complexity Applications Specific functionality Software library Reusable functionality Complex devices Compute & I/O Operating system Manage resources

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SLIDE 15

Abstraction

Complex devices Compute & I/O

Hardware Circuits Logic Gates Transistors

Here be dragons. (Electrical Engineering) … (Physics)

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SLIDE 16

Logic Gates

Input: Boolean value(s) (high and low voltages for 1 and 0) Output: Boolean value result of boolean function Always present, but may change when input changes

A B A & B A | B ~A 0 0 0 0 1 0 1 0 1 1 1 0 0 1 0 1 1 1 1 0

a b

  • ut
  • ut = a & b

And a b

  • ut
  • ut = a | b

Or a

  • ut
  • ut = ~a

Not

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SLIDE 17

More Logic Gates

A B A NAND B A NOR B 0 0 1 1 0 1 1 0 1 0 1 0 1 1 0 0

a b

  • ut
  • ut = ~(a | b)

NOR a b

  • ut
  • ut = ~(a & b)

NAND

Note the circle on the

  • utput.

This means “negate it.”

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SLIDE 18

Combinational Logic Circuits

  • Build up higher level processor functionality

from basic gates

Acyclic Network of Gates Inputs Outputs

Outputs are boolean functions of inputs Outputs continuously respond to changes to inputs

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SLIDE 19

What does this circuit output?

And Or Not

X Y Output X Y OutA OutB OutC OutD OutE 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Clicker Choices

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SLIDE 20

What can we do with these?

  • Build-up XOR from basic gates (AND, OR, NOT)

A B A ^ B 0 0 0 0 1 1 1 0 1 1 1 0

Q: When is A^B ==1?

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SLIDE 21

Which of these is an XOR circuit?

Draw an XOR circuit using AND, OR, and NOT gates. I’ll show you the clicker options after you’ve had some time.

And Or Not

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SLIDE 22

Which of these is an XOR circuit?

A B A B A B A B

E: None of these are XOR.

A: B: C: D:

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SLIDE 23

Checking the XOR circuit

A^B == (~A & B) | (A & ~B) A:0 B:0 A^B: A:0 B:1 A^B: A:1 B:0 A^B: A:1 B:1 A^B:

A B

  • ut =

A^B

1 1

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SLIDE 24

Abstracting the XOR circuit

A^B == (~A & B) | (A & ~B)

  • ut = A^B

A B

=

XOR

  • ut = A^B

A B

A B A ^ B 0 0 0 0 1 1 1 0 1 1 1 0

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SLIDE 25

Digital Circuits - Building a CPU

Three main classifications of HW circuits: 1. ALU: implement arithmetic & logic functionality

(ex) adder to add two values together

2. Storage: to store binary values

(ex) Register File: set of CPU registers

3. Control: support/coordinate instruction execution

(ex) fetch the next instruction to execute HW Circuits Logic Gates Transistor

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SLIDE 26

Digital Circuits - Building a CPU

Three main classifications of HW circuits: 1. ALU: implement arithmetic & logic functionality

(ex) adder to add two values together

Start with ALU components (e.g., adder, logic circuits) Combine (with multiplexer) into ALU!

HW Circuits Logic Gates Transistor

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SLIDE 27

Arithmetic Circuits

  • 1 bit adder: A+B
  • Two outputs:

1. Obvious one: the sum 2. Other one: ??

A B Cout Sum(A+B) 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0

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SLIDE 28

Which of these circuits is a one-bit adder?

A B Sum(A+B) Cout 0 0 0 1 1 1 0 1 1 1 1 A B

Sum Cout

A B

Sum Cout

A B

Cout Sum

A B

Sum Cout

A: B: C: D:

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SLIDE 29

More than one bit?

  • When adding, sometimes have carry in too

0011010 + 0001111

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SLIDE 30

One-bit (full) adder

Need to include: Carry-in & Carry-out

A B Cin Sum Cout 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1

=

1-bit adder Cin Cout A B Sum

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SLIDE 31

One-bit (full) adder

Need to include: Carry-in & Carry-out

A B Cin Sum Cout 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 1 1 1

=

1-bit adder Cin Cout A B Sum

HA HA

sum cout sum cout cout A B cin

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SLIDE 32

Multi-bit Adder (Ripple-carry Adder)

1-bit adder Cout A0 B0 Sum0 1-bit adder Cout A1 B1 Sum1 1-bit adder Cout A3 B3 Sum3 1-bit adder Cout A2 B2 Sum2

1-bit adder Cout AN-1 BN-1 SumN-1

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SLIDE 33

Three-bit Adder (Ripple-carry Adder)

1-bit adder 1 1-bit adder 1 1 1-bit adder

010 (2) + 011 (3)

=

3-bit adder A0 A1 A2 B0 B1 B2 Carry out Carry in Sum0 Sum1 Sum2

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SLIDE 34

Arithmetic Logic Unit (ALU)

  • One component that knows how to manipulate

bits in multiple ways

  • Addition
  • Subtraction
  • Multiplication / Division
  • Bitwise AND, OR, NOT, etc.
  • Built by combining components
  • Take advantage of sharing HW when possible

(e.g., subtraction using adder)

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SLIDE 35

Simple 3-bit ALU: Add and bitwise OR

3-bit adder Sum0 Sum1 Sum2 A0 A1 A2 B0 B1 B2 3-bit inputs A and B: Or0 Or2 Or1

At any given time, we

  • nly want the output

from ONE of these!

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SLIDE 36

Simple 3-bit ALU: Add and bitwise OR

3-bit adder Sum0 Sum1 Sum2 A0 A1 A2 B0 B1 B2 3-bit inputs A and B: Or0 Or2 Or1 Extra input: control signal to select Sum vs. OR Circuit that takes in Sum0-2 / Or0-2 and only outputs

  • ne of them,

based on control signal.

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SLIDE 37

Which of these circuits lets us select between two inputs?

Control Signal Input 1 Input 2 Control Signal Input 1 Input 2 Control Signal Input 1 Input 2

A: B: C:

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SLIDE 38

Multiplexor: Chooses an input value

Inputs: 2N data inputs, N signal bits Output: is one of the 2N input values

  • Control signal s, chooses the input for output
  • When s is 1: choose a, when s is 0: choose b
  • ut

b s a

  • ut = (s & a)|(~s &b)

1 bit 2-way MUX

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SLIDE 39

Word Multiplexor

Input:

two 32 bit values (a, b)

  • ne 1bit signal s

Each corresponding bit

  • f 32 bit input values,

fed through 1 bit mux

Output:

One 32 bit value (either a or b)

38

b31 s a31

  • ut31

b30 a30

  • ut30

b0 a0

  • ut0

s B A Out

MUX

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SLIDE 40

N-Way Multiplexor

Choose one of N inputs, need log2 N select bits

D0 D3 Out s0 s1

MUX4

D2 D1

s1 s0 choose 0 0 D0 0 1 D1 1 0 D2 1 1 D3

4-Way Multiplexor S Input to choose D0

D0 s1 s0

. . . . . . . . .

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SLIDE 41

Simple 3-bit ALU: Add and bitwise OR

3-bit adder Sum0 Sum1 Sum2 A0 A1 A2 B0 B1 B2 3-bit inputs A and B: Or0 Or2 Or1 Extra input: control signal to select Sum vs. OR Multiplexer!

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SLIDE 42

ALU: Arithmetic Logic Unit

  • Arithmetic and logic circuits: ADD, SUB, NOT, …
  • Control circuits: use op bits to select output
  • Circuits around ALU:
  • Select input values X and Y from instruction or register
  • Select op bits from instruction to feed into ALU
  • Feed output somewhere

OF

A L U

Y X op Y

  • p bits: selects which op to output

Output flags: set as a side effect of op (e.g., overflow detected)

ADD 2 3

X

CPU Instruction:

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SLIDE 43

Up next…

  • More digital circuits (storage and control)