COMPUTER ARCHITECTURE & SOFTWARE-DEFINED RADIO NEBU JOHN - - PowerPoint PPT Presentation

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COMPUTER ARCHITECTURE & SOFTWARE-DEFINED RADIO NEBU JOHN - - PowerPoint PPT Presentation

COMPUTER ARCHITECTURE & SOFTWARE-DEFINED RADIO NEBU JOHN MATHAI DIRECTOR, ENGINEERING AND ARCHITECTURE INTRODUCTION Higher Communications Performance System Substrates Architects Increased Hardware Algorithm Architects Complexity


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NEBU JOHN MATHAI DIRECTOR, ENGINEERING AND ARCHITECTURE

COMPUTER ARCHITECTURE & SOFTWARE-DEFINED RADIO

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INTRODUCTION

Communications System Architects Increased Algorithm Complexity More Performance Hardware Architects Higher Performance Substrates

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COMPUTER ARCHITECTURE  SDR

New standards, New uses Higher SDR performance Novel Computer Architectures

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TRENDS

  • Communications standards complexity
  • Algorithmic diversity
  • Large parameter spaces
  • Cross-stack communication
  • Processing power
  • Flexibility
  • Better Language/Compilers
  • Express complex ideas correctly
  • Efficient mapping
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SLIDE 5

TRENDS

  • IOT: Boldly going where no radio has gone before
  • Power consumption
  • Flexibility
  • Malleability
  • High Performance Computing
  • Scaling: both directions
  • Power efficiency
  • Architectural diversity

Edge Computing Edge Computing Big Compute Big Compute

HPC

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OVERVIEW

  • Quick look at history
  • Computer architecture  SDR
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SLIDE 7

HISTORY

  • C.E. Shannon
  • Digital Hardware Engineering
  • Information Theory
  • A. N. Kolmogorov
  • Algorithmic Information Theory
  • N. Wiener, W.R. Ashby, …
  • systems { convey, store, process } information for control

Computation Communications Control

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HOW DID WE GET HERE?

  • Constraints and Requirements
  • New standards and interfaces
  • IOT: malleability, performance, power economy
  • Cognitive radio: same
  • Advanced sensing: high-performance

Analog to Digital Hard Digital to Soft Digital Canonical to exotic HPC

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COMPUTATION

  • Map: math -> physical substrate
  • Analog
  • Variables analogous to physical quantities
  • Transistors in linear region
  • Digital
  • Variables are analogous to abstractions
  • Transistors in discrete on/off states
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SLIDE 11
  • 1. (A2D) ANALOG COMPLEXITY
  • Design Complexity
  • Verification Complexity
  • Simulation
  • Mismatch: ODE and digital computers
  • Simplifications
  • Validation Complexity
  • Smaller-scale vital systems
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  • 1. (A2D) DIGITAL SOLUTIONS
  • Arbitrary precision, dynamic range
  • H(z) => hardware implementation
  • Control flow
  • Scalability
  • Tractable Verification + Validation
  • Discrete-time simulation directly maps to digital computers
  • Integration with software stack
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  • 1. (A2D) REPERCUSSIONS
  • Verification Complexity
  • State space explosion
  • Adequate stimulation requires lots of time
  • Simulation: orders of magnitude slower than real time
  • How to practically ensure you’ve covered all cases?

Analog Analog Hard digital Hard digital Soft digital Soft digital

complexity

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  • 2. (H2S) MAKE IT SOFTWARE’S PROBLEM

Digital Front End Digital Front End Control Knobs Control Processor Control Processor

  • Add knobs to the digital front end
  • When it becomes impractical to control the knobs …
  • … develop schemes to control them via a processor
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  • 2. (H2S) MAKE IT SOFTWARE’S PROBLEM
  • Solves the Design + Verification problem:
  • Processors are well-known systems
  • Adding features: easy
  • Achieving performance: hard
  • Innovative architectures to address this
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  • 3. ARCHITECTURES: BASIC

… Instruction RAM Instruction RAM Data Input RAM Data Input RAM Data Output RAM Data Output RAM Functional Units

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  • 3. ARCHITECTURES: DSP

… Instruction RAM Instruction RAM Data Input RAM Data Input RAM Data Output RAM Data Output RAM More Functional Units

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  • 3. ARCHITECTURES: SIMD

… Instruction RAM Instruction RAM Data Input RAM Data Input RAM Data Output RAM Data Output RAM Parallel Functional Units

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  • 3. ARCHITECTURES: MIMD

… Instruction RAM Instruction RAM Data Input RAM Data Input RAM Data Output RAM Data Output RAM Parallel Independent Functional Units

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  • 3. ARCHITECTURES: VLIW

Instruction RAM Instruction RAM Data Input RAM Data Input RAM Data Output RAM Data Output RAM

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  • 3. ARCHITECTURES: GRID
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  • 3. HETEROGENEOUS SYSTEMS
  • Demanding
  • Hardware architecture, design and verification
  • Software engineering
  • Worthwhile
  • Ideal performance characteristics