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Chapter 9. Controller Design 9.1. Introduction 9.2. Effect of - - PowerPoint PPT Presentation

Chapter 9. Controller Design 9.1. Introduction 9.2. Effect of negative feedback on the network transfer functions 9.2.1. Feedback reduces the transfer function from disturbances to the output 9.2.2. Feedback causes the transfer function


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Fundamentals of Power Electronics Chapter 9: Controller design

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Chapter 9. Controller Design

9.1. Introduction 9.2. Effect of negative feedback on the network transfer functions

9.2.1. Feedback reduces the transfer function from disturbances to the output 9.2.2. Feedback causes the transfer function from the reference input to the output to be insensitive to variations in the gains in the forward path of the loop

9.3. Construction of the important quantities 1/(1+T) and T/(1+T) and the closed-loop transfer functions

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Fundamentals of Power Electronics Chapter 9: Controller design

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Controller design

9.4. Stability

9.4.1. The phase margin test 9.4.2. The relation between phase margin and closed-loop damping factor 9.4.3. Transient response vs. damping factor

9.5. Regulator design

9.5.1. Lead (PD) compensator 9.5.2. Lag (PI) compensator 9.5.3. Combined (PID) compensator 9.5.4. Design example

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Controller design

9.6. Measurement of loop gains

9.6.1. Voltage injection 9.6.2. Current injection 9.6.3. Measurement of unstable systems

9.7. Summary of key points

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9.1. Introduction

+ Ð + v(t) Ð vg(t) Switching converter Load pulse-width modulator vc(t) transistor gate driver d(t) iload(t)

d(t) Ts dTs t

v(t) vg(t) iload(t) d(t)

switching converter v(t) = f(vg, iload, d)

disturbances control input

}

}

Output voltage of a switching converter depends on duty cycle d, input voltage vg, and load current iload.

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The dc regulator application

v(t) vg(t) iload(t) d(t)

switching converter v(t) = f(vg, iload, d)

disturbances control input

}

}

Objective: maintain constant

  • utput voltage v(t) = V, in spite
  • f disturbances in vg(t) and

iload(t). Typical variation in vg(t): 100Hz

  • r 120Hz ripple, produced by

rectifier circuit. Load current variations: a significant step-change in load current, such as from 50% to 100% of rated value, may be applied. A typical output voltage regulation specification: 5V ± 0.1V. Circuit elements are constructed to some specified tolerance. In high volume manufacturing of converters, all output voltages must meet specifications.

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The dc regulator application

So we cannot expect to set the duty cycle to a single value, and obtain a given constant output voltage under all conditions. Negative feedback: build a circuit that automatically adjusts the duty cycle as necessary, to obtain the specified output voltage with high accuracy, regardless of disturbances or component tolerances.

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Negative feedback:

a switching regulator system

+ Ð + v Ð vg Switching converter Power input Load Ð+ compensator vref reference input Hv pulse-width modulator vc transistor gate driver d Gc(s) H(s) ve error signal sensor gain iload

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Negative feedback

vref reference input vc ve(t) error signal sensor gain v(t) vg(t) iload(t) d(t)

switching converter v(t) = f(vg, iload, d)

disturbances control input

}

}

+Ð pulse-width modulator

compensator

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9.2. Effect of negative feedback on the network transfer functions

+ Ð + Ð 1 : M(D) Le C R vg(s) + Ð v(s) e(s) d(s) j(s) d(s) iload(s)

Small signal model: open-loop converter Output voltage can be expressed as where v(s) = Gvd(s) d(s) + Gvg(s) vg(s) ± Zout(s) iload(s) Gvd(s) = v(s) d(s)

vg = 0 iload = 0

Gvg(s) = v(s) vg(s)

d = 0 iload = 0

Zout(s) = ± v(s) iload(s)

d = 0 vg = 0

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Voltage regulator system small-signal model

+ Ð + Ð 1 : M(D) Le C R vg(s) + Ð v(s) e(s) d(s) j(s) d(s) iload(s) reference input error signal +Ð pulse-width modulator compensator d(s) ve(s) vc(s) vref(s) Gc(s) sensor gain H(s) 1 VM H(s) v(s)

¥ Use small-signal converter model ¥ Perturb and linearize remainder

  • f feedback loop:

vref(t) = Vref + vref(t) ve(t) = Ve + ve(t) etc.

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Regulator system small-signal block diagram

vg(s) v(s) iload(s)

reference input error signal

+Ð pulse-width modulator compensator d(s) ve(s) vc(s) vref(s) sensor gain H(s) 1 VM H(s) v(s)

duty cycle variation

Gc(s) Gvd(s) Gvg(s) Zout(s)

ac line variation load current variation

+ Ð +

  • utput voltage

variation

converter power stage

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Solution of block diagram

v = vref GcGvd / VM 1 + HGcGvd / VM + vg Gvg 1 + HGcGvd / VM ± iload Zout 1 + HGcGvd / VM Manipulate block diagram to solve for . Result is v(s) which is of the form v = vref 1 H T 1 + T + vg Gvg 1 + T ± iload Zout 1 + T with T(s) = H(s) Gc(s) Gvd(s) / VM = "loop gain" Loop gain T(s) = products of the gains around the negative feedback loop.

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9.2.1. Feedback reduces the transfer functions from disturbances to the output

Original (open-loop) line-to-output transfer function: Gvg(s) = v(s) vg(s)

d = 0 iload = 0

With addition of negative feedback, the line-to-output transfer function becomes: v(s) vg(s)

vref = 0 iload = 0

= Gvg(s) 1 + T(s) Feedback reduces the line-to-output transfer function by a factor of 1 1 + T(s) If T(s) is large in magnitude, then the line-to-output transfer function becomes small.

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Closed-loop output impedance

Original (open-loop) output impedance: With addition of negative feedback, the output impedance becomes: Feedback reduces the output impedance by a factor of 1 1 + T(s) If T(s) is large in magnitude, then the output impedance is greatly reduced in magnitude. Zout(s) = ± v(s) iload(s)

d = 0 vg = 0

v(s) ± iload(s)

vref = 0 vg = 0

= Zout(s) 1 + T(s)

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9.2.2. Feedback causes the transfer function from the reference input to the output to be insensitive to variations in the gains in the forward path of the loop

Closed-loop transfer function from to is: which is independent of the gains in the forward path of the loop. This result applies equally well to dc values: v(s) vref v(s) vref(s)

vg = 0 iload = 0

= 1 H(s) T(s) 1 + T(s) If the loop gain is large in magnitude, i.e., || T || >> 1, then (1+T) » T and T/(1+T) » T/T = 1. The transfer function then becomes v(s) vref(s) » 1 H(s) V Vref = 1 H(0) T(0) 1 + T(0) » 1 H(0)

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9.3. Construction of the important quantities 1/(1+T) and T/(1+T)

Example fp1 QdB

Ð 40dB/dec

| T0 |dB fz fc fp2

Ð 20dB/dec Ð 40dB/dec crossover frequency

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| T ||

0dB Ð20dB Ð40dB 20dB 40dB 60dB 80dB

T(s) = T0 1 + s wz 1 + s Qwp1 + s wp1

2

1 + s wp2 At the crossover frequency fc, || T || = 1

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Approximating 1/(1+T) and T/(1+T)

T 1 + T » 1 for || T || >> 1 T for || T || << 1 1 1+T(s) » 1 T(s) for || T || >> 1 1 for || T || << 1

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Example: construction of T/(1+T)

fp1 fz fc fp2

Ð 20 dB/decade Ð 40 dB/decade Crossover frequency

f || T ||

0 dB Ð20 dB Ð40 dB 20 dB 40 dB 60 dB 80 dB

T 1 + T

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz

T 1 + T » 1 for || T || >> 1 T for || T || << 1

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Example: analytical expressions for approximate reference to output transfer function

v(s) vref(s) = 1 H(s) T(s) 1 + T(s) » 1 H(s)

v(s) vref(s) = 1 H(s) T(s) 1 + T(s) » T(s) H(s) = Gc(s)Gvd(s) VM

At frequencies sufficiently less that the crossover frequency, the loop gain T(s) has large magnitude. The transfer function from the reference to the output becomes This is the desired behavior: the output follows the reference according to the ideal gain 1/H(s). The feedback loop works well at frequencies where the loop gain T(s) has large magnitude. At frequencies above the crossover frequency, || T || < 1. The quantity T/(1+T) then has magnitude approximately equal to 1, and we obtain This coincides with the open-loop transfer function from the reference to the output. At frequencies where || T || < 1, the loop has essentially no effect on the transfer function from the reference to the output.

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Same example: construction of 1/(1+T)

fp1 QdB

Ð 40 dB/decade

| T0 |dB fz fc fp2

Crossover frequency

|| T ||

0 dB Ð20 dB Ð40 dB 20 dB 40 dB 60 dB 80 dB Ð60 dB Ð80 dB

f

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz

QdB Ð | T0 |dB fp1 fz 1 1 + T

Ð 40 dB/decade + 40 dB/decade + 20 dB/decade Ð 20 dB/decade

1 1+T(s) » 1 T(s) for || T || >> 1 1 for || T || << 1

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Interpretation: how the loop rejects disturbances

Below the crossover frequency: f < fc and || T || > 1 Then 1/(1+T) » 1/T, and disturbances are reduced in magnitude by 1/|| T || Above the crossover frequency: f > fc and || T || < 1 Then 1/(1+T) » 1, and the feedback loop has essentially no effect on disturbances 1 1+T(s) » 1 T(s) for || T || >> 1 1 for || T || << 1

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Terminology: open-loop vs. closed-loop

Original transfer functions, before introduction of feedback (Òopen-loop transfer functionsÓ): Upon introduction of feedback, these transfer functions become (Òclosed-loop transfer functionsÓ): The loop gain: Gvd(s) Gvg(s) Zout(s) 1 H(s) T(s) 1 + T(s) Gvg(s) 1 + T(s) Zout(s) 1 + T(s) T(s)

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9.4. Stability

Even though the original open-loop system is stable, the closed-loop transfer functions can be unstable and contain right half-plane poles. Even when the closed-loop system is stable, the transient response can exhibit undesirable ringing and overshoot, due to the high Q -factor of the closed- loop poles in the vicinity of the crossover frequency. When feedback destabilizes the system, the denominator (1+T(s)) terms in the closed-loop transfer functions contain roots in the right half-plane (i.e., with positive real parts). If T(s) is a rational fraction of the form N(s) / D(s), where N(s) and D(s) are polynomials, then we can write T(s) 1 + T(s) = N(s) D(s) 1 + N(s) D(s) = N(s) N(s) + D(s) 1 1 + T(s) = 1 1 + N(s) D(s) = D(s) N(s) + D(s) ¥ Could evaluate stability by evaluating N(s) + D(s), then factoring to evaluate roots. This is a lot of work, and is not very illuminating.

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Determination of stability directly from T(s)

¥ Nyquist stability theorem: general result. ¥ A special case of the Nyquist stability theorem: the phase margin test Allows determination of closed-loop stability (i.e., whether 1/(1+T(s)) contains RHP poles) directly from the magnitude and phase of T(s). A good design tool: yields insight into how T(s) should be shaped, to

  • btain good performance in transfer functions containing 1/(1+T(s))

terms.

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9.4.1. The phase margin test

A test on T(s), to determine whether 1/(1+T(s)) contains RHP poles. The crossover frequency fc is defined as the frequency where || T(j2pfc) || = 1 Þ 0dB The phase margin jm is determined from the phase of T(s) at fc , as follows: jm = 180û + ÐT(j2pfc) If there is exactly one crossover frequency, and if T(s) contains no RHP poles, then the quantities T(s)/(1+T(s)) and 1/(1+T(s)) contain no RHP poles whenever the phase margin jm is positive.

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Example: a loop gain leading to a stable closed-loop system

fc

crossover frequency 0dB Ð20dB Ð40dB 20dB 40dB 60dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

fp1 fz || T ||

0û Ð90û Ð180û Ð270û

jm Ð T Ð T || T ||

ÐT(j2pfc) = Ð112û jm = 180û Ð 112û = +68û

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Example: a loop gain leading to an unstable closed-loop system

fc

crossover frequency 0dB Ð20dB Ð40dB 20dB 40dB 60dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

fp1 fp2 || T ||

0û Ð90û Ð180û Ð270û

Ð T Ð T || T || jm (< 0)

ÐT(j2pfc) = Ð230û jm = 180û Ð 230û = Ð50û

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9.4.2. The relation between phase margin and closed-loop damping factor

How much phase margin is required? A small positive phase margin leads to a stable closed-loop system having complex poles near the crossover frequency with high Q. The transient response exhibits overshoot and ringing. Increasing the phase margin reduces the Q. Obtaining real poles, with no overshoot and ringing, requires a large phase margin. The relation between phase margin and closed-loop Q is quantified in this section.

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A simple second-order system

Consider the case where T(s) can be well- approximated in the vicinity of the crossover frequency as T(s) = 1 s w0 1 + s w2

0dB Ð20dB Ð40dB 20dB 40dB

f || T ||

0û Ð90û Ð180û Ð270û

Ð T || T || Ð T

f0 Ð 90û f2

jm

f2 f2 / 10 10 f2

f0 f f0 f2 f 2

Ð 20dB/decade Ð 40dB/decade

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Closed-loop response

T(s) = 1 s w0 1 + s w2 T(s) 1 + T(s) = 1 1 + 1 T(s) = 1 1 + s w0 + s2 w0w2 T(s) 1 + T(s) = 1 1 + s Qwc + s wc

2

If Then

  • r,

where wc = w0w2 = 2pfc Q = w0 wc = w0 w2

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Low-Q case

Q = w0 wc = w0 w2 Q wc = w0 wc Q = w2

0dB Ð20dB Ð40dB 20dB 40dB

f || T ||

f0 f2

f0 f f0 f2 f 2

Ð 20dB/decade Ð 40dB/decade

T 1 + T fc = f0 f2

Q = f0 / fc

low-Q approximation:

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High-Q case

f || T ||

f0 f2

f0 f f0 f2 f 2

Ð 20dB/decade Ð 40dB/decade

T 1 + T fc = f0 f2

Q = f0 / fc

0dB Ð20dB Ð40dB 20dB 40dB 60dB

wc = w0w2 = 2pfc Q = w0 wc = w0 w2

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Q vs. jm

Solve for exact crossover frequency, evaluate phase margin, express as function of jm. Result is:

Q = cos jm sin jm jm = tan-1 1 + 1 + 4Q

4

2Q

4

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Q vs. jm

0° 10° 20° 30° 40° 50° 60° 70° 80° 90°

jm Q

Q = 1 Þ 0dB Q = 0.5 Þ Ð6dB jm = 52û jm = 76û

  • 20dB
  • 15dB
  • 10dB
  • 5dB

0dB 5dB 10dB 15dB 20dB

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9.4.3. Transient response vs. damping factor

Unit-step response of second-order system T(s)/(1+T(s)) v(t) = 1 + 2Q e-wct/2Q 4Q

2 ± 1

sin 4Q

2 ± 1

2Q wc t + tan-1 4Q

2 ± 1

v(t) = 1 ± w2 w2 ± w1 e±w1t ± w1 w1 ± w2 e±w2t w1, w2 = wc 2Q 1 ± 1 ± 4Q

2

Q > 0.5 Q < 0.5 peak v(t) = 1 + e± p /

4Q2 ± 1

For Q > 0.5 , the peak value is

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Transient response vs. damping factor

0.5 1 1.5 2 5 10 15

wct, radians v(t)

Q=10 Q=50 Q=4 Q=2 Q=1 Q=0.75 Q=0.5 Q=0.3 Q=0.2 Q=0.1 Q=0.05 Q=0.01

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9.5. Regulator design

Typical specifications: ¥ Effect of load current variations on output voltage regulation This is a limit on the maximum allowable output impedance ¥ Effect of input voltage variations on the output voltage regulation This limits the maximum allowable line-to-output transfer function ¥ Transient response time This requires a sufficiently high crossover frequency ¥ Overshoot and ringing An adequate phase margin must be obtained The regulator design problem: add compensator network Gc(s) to modify T(s) such that all specifications are met.

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9.5.1. Lead (PD) compensator

Gc(s) = Gc0 1 + s wz 1 + s wp f || Gc || Ð Gc

Gc0 0û fp fz/10 fp/10 10fz

fjmax = fz fp

+ 45û/decade Ð 45û/decade fz Gc0 fp fz

Improves phase margin

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Lead compensator: maximum phase lead

1 10 100 1000

maximum phase lead

0û 15û 30û 45û 60û 75û 90û

fp / fz

fjmax = fzfp Ð Gc(fjmax) = tan-1 fp fz ± fz fp 2 fp fz = 1 + sin q 1 ± sin q

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Lead compensator design

To optimally obtain a compensator phase lead of q at frequency fc, the pole and zero frequencies should be chosen as follows: fz = fc 1 ± sin q 1 + sin q fp = fc 1 + sin q 1 ± sin q If it is desired that the magnitude

  • f the compensator gain at fc be

unity, then Gc0 should be chosen as Gc0 = fz fp

f || Gc || Ð Gc

Gc0 0û fp fz/10 fp/10 10fz

fjmax = fz fp

+ 45û/decade Ð 45û/decade fz Gc0 fp fz

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Example: lead compensation

f || T ||

0û Ð90û Ð180û Ð270û

Ð T || T || Ð T

T0

f0

fz fp fc jm

T0 Gc0

  • riginal gain

compensated gain

  • riginal phase asymptotes

compensated phase asymptotes 0dB Ð20dB Ð40dB 20dB 40dB 60dB

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9.5.2. Lag (PI) compensation

f || Gc || Ð Gc

Gc¥ 0û fL/10 + 45û/decade fL Ð 90û 10fL Ð 20dB /decade

Gc(s) = Gc¥ 1 + wL s Improves low- frequency loop gain and regulation

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Example: lag compensation

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz 90û 0û Ð90û Ð180û

Gc¥Tu0 fL f0 Tu0

Ð Tu || Tu ||

f0

|| T ||

fc

Ð T

10 fL 10 f0 jm

  • riginal

(uncompensated) loop gain is Tu(s) = Tu0 1 + s w0 compensator: Gc(s) = Gc¥ 1 + wL s Design strategy: choose Gc¥ to obtain desired crossover frequency wL sufficiently low to maintain adequate phase margin

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Example, continued

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

Gc¥Tu0 fL f0

|| T ||

fc

1 1 + T

fL f0

1 Gc¥ Tu0 Construction of 1/(1+T), lag compensator example:

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9.5.3. Combined (PID) compensator

0dB Ð20dB Ð40dB 20dB 40dB

f || Gc || Ð Gc || Gc || Ð Gc

Gcm

fz

Ð 90û

fp1

90û 0û Ð90û Ð180û

fz/10 fp1/10 10fz

fL fc

fL/10 10fL

90û/dec 45û/dec Ð 90û/dec

fp2

fp2/10 10fp1

Gc(s) = Gcm 1 + wL s 1 + s wz 1 + s wp1 1 + s wp2

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9.5.4. Design example

+ Ð + v(t) Ð vg(t) 28V Ð+ compensator Hv pulse-width modulator vc transistor gate driver d Gc(s) H(s) ve error signal sensor gain iload L 50mH C 500mF R 3W fs = 100kHz VM = 4V vref 5V

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Quiescent operating point

Input voltage Vg = 28V Output V = 15V, Iload = 5A, R = 3W Quiescent duty cycle D = 15/28 = 0.536 Reference voltage Vref = 5V Quiescent value of control voltage Vc = DVM = 2.14V Gain H(s) H = Vref/V = 5/15 = 1/3

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Small-signal model

+ Ð + Ð 1 : D L C R vg(s) + Ð v(s) V D2 d V R d iload(s) error signal +Ð compensator d(s) ve(s) vc(s) vref ( = 0) Gc(s) H(s) 1 VM H(s) v(s) T(s) VM = 4V H = 1 3

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Open-loop control-to-output transfer function Gvd(s)

Gvd(s) = V D 1 1 + sL R + s2LC Gvd(s) = Gd0 1 1 + s Q0w0 + s w0

2

Gd0 = V D = 28V f0 = w0 2p = 1 2p LC = 1kHz Q0 = R C L = 9.5 Þ 19.5dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz 0û Ð90û Ð180û Ð270û

Ð Gvd f0 || Gvd || Gd0 = 28V Þ 29dBV || Gvd || Ð Gvd

0dBV Ð20dBV Ð40dBV 20dBV 40dBV 60dBV

Q0 = 9.5 Þ 19.5dB 10±1 / 2Q0 f0 = 900Hz 101 / 2Q0 f0 = 1.1kHz

standard form: salient features:

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Open-loop line-to-output transfer function and output impedance

Gvg(s) = D 1 1 + sL R + s2LC Gvg(s) = Gg0 1 1 + s Q0w0 + s w0

2

Zout(s) = R || 1 sC || sL = sL 1 + sL R + s2LC Ñsame poles as control-to-output transfer function standard form: Output impedance:

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System block diagram

vg(s) v(s) iload(s) +Ð d(s) ve(s) vc(s) vref ( = 0) H(s) 1 VM

duty cycle variation

Gc(s) Gvd(s) Gvg(s) Zout(s)

ac line variation load current variation

+ Ð + converter power stage T(s) VM = 4V H = 1 3

T(s) = Gc(s) 1 VM Gvd(s) H(s) T(s) = Gc(s) H(s) VM V D 1 1 + s Q0w0 + s w0

2

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Uncompensated loop gain (with Gc = 1)

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| Tu ||

0û Ð90û Ð180û Ð270û

Ð Tu || Tu || Ð Tu

Tu0 2.33 Þ 7.4dB

f0

1kHz 0û 10

± 1 2Q f0 = 900Hz

10

1 2Q f0 = 1.1kHz

Q0 = 9.5 Þ 19.5dB

Ð 40 dB/decade

With Gc = 1, the loop gain is Tu(s) = Tu0 1 1 + s Q0w0 + s w0

2

Tu0 = H V D VM = 2.33 Þ 7.4dB fc = 1.8kHz, jm = 5û

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Lead compensator design

¥ Obtain a crossover frequency of 5kHz, with phase margin of 52û ¥ Tu has phase of approximately -180û at 5kHz, hence lead (PD) compensator is needed to increase phase margin. ¥ Lead compensator should have phase of +52û at 5kHz ¥ Tu has magnitude of -20.6dB at 5kHz ¥ Lead compensator gain should have magnitude of +20.6dB at 5kHz ¥ Lead compensator pole and zero frequencies should be fz = (5kHz) 1 ± sin (52°) 1 + sin (52°) = 1.7kHz fp = (5kHz) 1 + sin (52°) 1 ± sin (52°) = 14.5kHz ¥ Compensator dc gain should be Gc0 = fc f0

2 1

Tu0 fz fp = 3.7 Þ 11.3dB

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Lead compensator Bode plot

fc = fzfp

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| Gc || Ð Gc || Gc || Ð Gc

Gc0

fz

fp

Gc0 fp fz

90û 0û Ð90û Ð180û

fz/10 fp/10 10fz

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Loop gain, with lead compensator

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| T ||

0û Ð90û Ð180û Ð270û

Ð T || T || Ð T

T0 = 8.6 Þ 18.7dB

f0

1kHz 0û Q0 = 9.5 Þ 19.5dB

fz fp

1.7kHz 14kHz

fc

5kHz 170Hz 1.1kHz 1.4kHz 900Hz 17kHz

jm=52û

T(s) = Tu0 Gc0 1 + s wz 1 + s wp 1 + s Q0w0 + s w0

2

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1/(1+T), with lead compensator

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| T ||

T0 = 8.6 Þ 18.7dB

f0

Q0 = 9.5 Þ 19.5dB

fz fp fc

Q0 1 / T0 = 0.12 Þ Ð 18.7dB

1 1 + T

¥ need more low-frequency loop gain ¥ hence, add inverted zero (PID controller)

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Improved compensator (PID)

0dB Ð20dB Ð40dB 20dB 40dB

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| Gc || Ð Gc || Gc || Ð Gc

Gcm

fz

Ð 90û

fp

90û 0û Ð90û Ð180û

fz/10 fp/10 10fz

fL fc

fL/10 10fL

90û/dec 45û/dec Ð 45û/dec

Gc(s) = Gcm 1 + s wz 1 + wL s 1 + s wp ¥ add inverted zero to PD compensator, without changing dc gain or corner frequencies ¥ choose fL to be fc/10, so that phase margin is unchanged

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T(s) and 1/(1+T(s)), with PID compensator

f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

|| T || f0 fz fp fc

Q0

1 1 + T fL

Q0

0dB Ð20dB Ð40dB 20dB 40dB 60dB Ð60dB Ð80dB

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Line-to-output transfer function

D Tu0Gcm f

1Hz 10Hz 100Hz 1kHz 10kHz 100kHz

fz fc fL v vg

  • pen-loop || Gvg ||

closed-loop Gvg 1 + T

Ð40dB Ð60dB Ð80dB Ð20dB 0dB 20dB Ð100dB

f0

Q0

Gvg(0) = D

Ð 40dB/dec 20dB/dec

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9.6. Measurement of loop gains

G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z1(s) Z2(s) A + Ð vx(s) G1(s) ve(s) T(s) Block 1 Block 2

Objective: experimentally determine loop gain T(s), by making measurements at point A Correct result is T(s) = G1(s) Z2(s) Z1(s) + Z2(s) G2(s) H(s)

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Conventional approach: break loop, measure T(s) as conventional transfer function

G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z1(s) Z2(s) + Ð vx(s) G1(s) ve(s) Block 1 Block 2 Ð + vy(s) vz dc bias VCC Tm(s)

Tm(s) = vy(s) vx(s)

vref = 0 vg = 0

measured gain is Tm(s) = G1(s) G2(s) H(s)

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Measured vs. actual loop gain

T(s) = G1(s) Z2(s) Z1(s) + Z2(s) G2(s) H(s) Tm(s) = G1(s) G2(s) H(s) Tm(s) = T(s) 1 + Z1(s) Z2(s) Tm(s) » T(s) provided that Z2 >> Z1 Actual loop gain: Measured loop gain: Express Tm as function of T:

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Discussion

¥ Breaking the loop disrupts the loading of block 2 on block 1. A suitable injection point must be found, where loading is not significant. ¥ Breaking the loop disrupts the dc biasing and quiescent operating point. A potentiometer must be used, to correctly bias the input to block 2. In the common case where the dc loop gain is large, it is very difficult to correctly set the dc bias. ¥ It would be desirable to avoid breaking the loop, such that the biasing circuits of the system itself set the quiescent operating point.

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9.6.1. Voltage injection

Ð + G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z2(s) G1(s) ve(s) Block 1 Block 2 vy(s) Tv(s) Z1(s) + Ð vx(s) i(s) Zs(s) Ð + vz

¥ Ac injection source vz is connected between blocks 1 and 2 ¥ Dc bias is determined by biasing circuits of the system itself ¥ Injection source does modify loading of block 2 on block 1

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Voltage injection: measured transfer function Tv(s)

Ð + G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z2(s) G1(s) ve(s) Block 1 Block 2 vy(s) Tv(s) Z1(s) + Ð vx(s) i(s) Zs(s) Ð + vz

Network analyzer measures Tv(s) = vy(s) vx(s)

vref = 0 vg = 0

Solve block diagram: ve(s) = ± H(s) G2(s) vx(s) ± vy(s) = G1(s) ve(s) ± i(s) Z1(s) ± vy(s) = ± vx(s) G2(s) H(s) G1(s) ± i(s) Z1(s) Hence with i(s) = vx(s) Z2(s) Substitute: vy(s) = vx(s) G1(s) G2(s) H(s) + Z1(s) Z2(s) which leads to the measured gain Tv(s) = G1(s) G2(s) H(s) + Z1(s) Z2(s)

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Comparison of Tv(s) with T(s)

T(s) = G1(s) Z2(s) Z1(s) + Z2(s) G2(s) H(s) Actual loop gain is Gain measured via voltage injection: Tv(s) = G1(s) G2(s) H(s) + Z1(s) Z2(s) Express Tv(s) in terms of T(s): Tv(s) = T(s) 1 + Z1(s) Z2(s) + Z1(s) Z2(s) Condition for accurate measurement: Tv(s) » T(s) provided (i) Z1(s) << Z2(s) , and (ii) T(s) >> Z1(s) Z2(s)

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Example: voltage injection

Ð + + Ð + Ð + Ð 50W 500W vz vx(s) vy(s) Block 1 Block 2

Z1(s) = 50W Z2(s) = 500W Z1(s) Z2(s) = 0.1 Þ ± 20dB suppose actual T(s) = 10

4

1 + s 2p 10Hz 1 + s 2p 100kHz 1 + Z1(s) Z2(s) = 1.1 Þ 0.83dB

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Example: measured Tv(s) and actual T(s)

f || T ||

0dB Ð20dB Ð40dB 20dB 40dB 60dB 80dB 100dB 10Hz 100Hz 1kHz 10kHz 100kHz 1MHz

|| Tv || Z1 Z2 Þ ± 20dB || Tv || || T ||

Tv(s) = T(s) 1 + Z1(s) Z2(s) + Z1(s) Z2(s)

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9.6.2. Current injection

G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z2(s) G1(s) ve(s) Block 1 Block 2 Ti(s) Z1(s) i x i y iz Zs(s)

Ti(s) = iy(s) ix(s)

vref = 0 vg = 0

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Current injection

It can be shown that Ti(s) = T(s) 1 + Z2(s) Z1(s) + Z2(s) Z1(s) Conditions for obtaining accurate measurement: Injection source impedance Zs is irrelevant. We could inject using a Thevenin-equivalent voltage source:

vz Rs Cb i x i y iz

(i) Z2(s) << Z1(s) , and (ii) T(s) >> Z2(s) Z1(s)

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9.6.3. Measurement of unstable systems

Ð + G2(s) vx(s) = v(s) +Ð ve(s) vref(s) H(s) + Ð Z2(s) G1(s) ve(s) Block 1 Block 2 vy(s) Tv(s) Z1(s) + Ð vx(s) Rext Ð + vz Lext Zs(s)

¥ Injection source impedance Zs does not affect measurement ¥ Increasing Zs reduces loop gain of circuit, tending to stabilize system ¥ Original (unstable) loop gain is measured (not including Zs ), while circuit operates stabily

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9.7. Summary of key points

  • 1. Negative feedback causes the system output to closely follow the

reference input, according to the gain 1 / H(s). The influence on the

  • utput of disturbances and variation of gains in the forward path is

reduced.

  • 2. The loop gain T(s) is equal to the products of the gains in the

forward and feedback paths. The loop gain is a measure of how well the feedback system works: a large loop gain leads to better regulation of the output. The crossover frequency fc is the frequency at which the loop gain T has unity magnitude, and is a measure of the bandwidth of the control system.

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Summary of key points

  • 3. The introduction of feedback causes the transfer functions from

disturbances to the output to be multiplied by the factor 1/(1+T(s)). At frequencies where T is large in magnitude (i.e., below the crossover frequency), this factor is approximately equal to 1/T(s). Hence, the influence of low-frequency disturbances on the output is reduced by a factor of 1/T(s). At frequencies where T is small in magnitude (i.e., above the crossover frequency), the factor is approximately equal to 1. The feedback loop then has no effect. Closed-loop disturbance-to-

  • utput transfer functions, such as the line-to-output transfer function or

the output impedance, can easily be constructed using the algebra-on- the-graph method.

  • 4. Stability can be assessed using the phase margin test. The phase of T

is evaluated at the crossover frequency, and the stability of the important closed-loop quantities T/(1+T) and 1/(1+T) is then deduced. Inadequate phase margin leads to ringing and overshoot in the system transient response, and peaking in the closed-loop transfer functions.

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Summary of key points

  • 5. Compensators are added in the forward paths of feedback loops to

shape the loop gain, such that desired performance is obtained. Lead compensators, or PD controllers, are added to improve the phase margin and extend the control system bandwidth. PI controllers are used to increase the low-frequency loop gain, to improve the rejection of low-frequency disturbances and reduce the steady-state error.

  • 6. Loop gains can be experimentally measured by use of voltage or

current injection. This approach avoids the problem of establishing the correct quiescent operating conditions in the system, a common difficulty in systems having a large dc loop gain. An injection point must be found where interstage loading is not significant. Unstable loop gains can also be measured.