Cache Attacks on the Cloud Thomas Eisenbarth Joint work with Gorka - - PowerPoint PPT Presentation

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Cache Attacks on the Cloud Thomas Eisenbarth Joint work with Gorka - - PowerPoint PPT Presentation

Cache Attacks on the Cloud Thomas Eisenbarth Joint work with Gorka Irazoqui, Mehmet Sinan Inci, Berk Gulmezoglu and Berk Sunar Real World Cryptography 1/8/2016 Outline Cloud Computing and Isolation Extracting Information from Co-located


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SLIDE 1

Cache Attacks on the Cloud

Thomas Eisenbarth Joint work with Gorka Irazoqui, Mehmet Sinan Inci, Berk Gulmezoglu and Berk Sunar

Real World Cryptography 1/8/2016

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SLIDE 2

Outline

  • Cloud Computing and Isolation
  • Extracting Information from Co-located VM
  • Attacking Crypto across VM Boundaries
  • RSA Key Recovery in a Public Cloud

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SLIDE 3

Cloud Computing

  • Computation increasingly outsourced to cloud servers
  • CSPs: many users on shared, homogeneous platforms
  • Users rent VMs, share same computer
  • Shared resources  Information Leakage?

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SLIDE 4

Security through Isolation

  • Virtual machines: Abstraction of physical machine
  • Hypervisor (VMM) ensures Isolation through

virtualization

  • VMs might feel each other’s load on some low-level

resources potential side channels

Hardware VMM

Guest OS #1 Guest OS #2

VM VM

Spy Victim

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SLIDE 5

Outline

  • Cloud Computing and Isolation
  • Extracting Information from Co-located VM
  • Attacking Crypto across VM Boundaries
  • RSA Key Recovery in a Public Cloud

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SLIDE 6

Cross-VM Side Channel Attack

Suitable covert channel in the cloud?

– Cross Core: Last Level Cache (L3 Cache) accesses Adversary and victim share full access to L3 cache Cache Access cannot be virtualized (70x slowdown)

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Cache Attacks?

  • Cache attacks are old [Hu92]
  • General technique: Prime+Probe [OST06]:
  • 1. Prime desired memory lines

fill monitored cache lines with data making an eviction set

  • 2. Wait for some time
  • 3. Probe memory lines

read eviction set data and time read

  • Problems:

– Usually only applied on L1-Cache (64kB) not cross-core – L3-Cache is too large (25MB!) not controlled by spy – Solution: Huge Pages give spy control over L3$

7 [Hu92] Hu, W.-M. (Digital Equipment Corp., Littleton, MA, USA) Lattice scheduling and covert channels. IEEE Oakland 92 OST06] DA Osvik, A Shamir, E Tromer Cache attacks and countermeasures: the case of AES. CT-RSA 2006

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SLIDE 8

Outline

  • Cloud Computing and Isolation
  • Extracting Information from Co-located VM
  • Attacking Crypto across VM Boundaries
  • RSA Key Recovery in a Public Cloud

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SLIDE 9

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Private L1/L2 CACHE Shared L3 CACHE Memory Victim Spy

Fast reload time Slow reload time

Clean detection if monitored cache set was accessed

Prime+Probe Attack: Concept

Steps: (Preparation: Find eviction set)

  • 1. Prime desired memory lines
  • 2. Wait for some time
  • 3. Probe memory lines and measure reload time.
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SLIDE 10 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 11000 50 100 150 200 250 timeslot Reload time Decryption Start First Secret Exponent (dp) Second Secret Exponent (dq)

How to get crypto keys?

Detect key-dependent cache accesses:

  • RSA/ElGamal:

– Sliding window exponentiation – Occurrence of multiplicands in cache reveals key bits

  • AES:

– T-table implementation: Xors and table lookups – Detect t-table access in last round (table entry corresponding to 𝑑𝑗is always in LLC)

10 [YF14] Y Yarom, KE Falkner Flush+ Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack, USENIX Security 2014 [IIES14] Irazoqui, G., Inci, M. S., Eisenbarth, T., & Sunar, B. Wait a minute! A fast, Cross-VM attack on AES. RAID 2014

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SLIDE 11

Are Cross-VM Cache Attacks Realistic?

Cross-VM Cache Attacks on El Gamal [LY+15] and on AES [IES15] work if

  • Server has a shared level of cache
  • Attacker and the victim are physically co-

located

  • VMM implements memory deduplication

11 [LY+15] Liu, F., Yarom, Y., Ge, Q., Heiser, G., & Lee, R. B. (2015). Last-Level Cache Side-Channel Attacks are Practical. (S&P 2015). [IES15] Irazoqui, G., Eisenbarth, T., & Sunar, B. S$A: A shared cache attack that works across cores and defies VM sandboxing—and Its application to AES. 36th IEEE Symposium on Security and Privacy (S&P 2015)

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SLIDE 12

Outline

  • Cloud Computing and Isolation
  • Extracting Information from Co-located VM
  • Attacking Crypto across VM Boundaries
  • RSA Key Recovery in a Public Cloud

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Co-location

First success in 2009 [RTS09]:

  • 1. Launch many instances on cloud
  • 2. Check if any are co-located
  • How to detect Co-location?

– Ping time? – IP address of instance or hypervisor? – Disk Load?

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* In Sept 2008

[RTSS09] Ristenpart, T., Tromer, E., Shacham, H., and Savage, S. Hey, You, Get off of My Cloud: Exploring Information Leakage in Third- party Compute Clouds. ACM CCS '09

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Test Setup

  • AWS EC2 m2.medium instances:

– Intel Xeon E5 2670 v2 CPU @2.5 GHz – 10 cores share 25 MB of L3 cache – Modified (Hardened) Xen VMM – Up to 10 co-located instances (VMs)

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  • 4 accounts w/ 20 instances (no

within-acc colocation)

  • Ping is constant time
  • HDDs replaced with SSDs
  • Dom0 IPs hidden

New Co-location detection needed

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SLIDE 15

00:00 02:00 04:00 06:00 08:00 10:00 12:00 14:00 16:00 18:00 20:00 22:00 00:00

Hour of Day (EST) LLC Noise

Friday Monday Tuesday Average

Co-Location Attempt: LLC Cache Accesses

+ Works reliable and we know how to do it + Difficult to block

  • Requires slice recovery
  • Noise?

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  • Gives Reliable Co-location Detection
  • Ensures that cache attack will work

[XWW15] XU, Z., WANG, H., AND WU, Z. A measurement study on co-residence threat inside the cloud. USENIX Security 15 [VZRS15] VARADARAJAN, V., ZHANG, Y., RISTENPART, T., AND SWIFT, M. A placement vulnerability study in multi-tenant public clouds. USENIX Security 15

Alternative: Memory bus contention [XWW15,VZRS15]

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Target Cryptosystem

  • Libgcrypt 1.6.2 ‘s RSA implementation

– RSA CRT with 2048 bit modulus size – Sliding window exponentiation (5 bits) – Message blinding to prevent chosen ciphertext attacks Is this state-of-the-art?

  • Libgcrypt 1.6.3 (February 2015)

– Table accesses now constant execution flow (no more cache games)

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Attack on RSA-CRT Sliding Window

  • 1. Find cache trace of sliding window

multiplicands

  • 2. Observe several exponentiations

to reduce noise

  • 3. Align and filter observations

to reduce noise

  • 4. Run error correcting key recovery

to fix remaining noise errors

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Identifying a Correct Cache Line

  • 10x2048 cache lines
  • Source code reveals

approximate position

  • Search through

remaining choices

  • Once found, repeat
  • bservations

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2000 4000 6000 8000 10000 50 100 150 200 250 timeslot Reload time 2000 4000 6000 8000 10000 50 100 150 200 250 timeslot Reload time

1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 11000 50 100 150 200 250 timeslot Reload time Decryption Start First Secret Exponent (dp) Second Secret Exponent (dq)

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Processing Noisy Observations

Accesses to specific cache line during subsequent encryptions

  • 1. Alignment to remove temporal shifts
  • 2. Remove noise artifacts

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1000 2000 3000 4000 5000 6000 1 2 3 4 5 6 7 8 9 10 11

500 1000 1500 2000 2500 3000 2 4 6 8 10 12

timeslot

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After Processing and Alignment

  • Correct (red) vs recovered (blue):

little remaining noise

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SLIDE 21

Final key recovery?

  • Distance to table initialization reveals

multiplicand value

  • 𝑒 must be recovered from noisy 𝑒𝑞 and 𝑒𝑟

More details in: ia.cr/2015/898

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Conclusions

  • Cache Attacks in public clouds work

– Noise and co-location need to be tackled

  • Fully patched crypto libraries (at least major
  • pen source ones) are no longer vulnerable
  • Countermeasures are still open problem:

Many proposed, but cost overhead prohibitive?

  • How about non-crypto code?

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SLIDE 23

Thank you!

vernam.wpi.edu teisenbarth@wpi.edu

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Cross Processor Cache Attacks?

  • Interprocessor Communication:

Cache Coherence Protocols use fast direct links between processors:

  • Faster than memory access  Timing behavior

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[IES15] G Irazoqui and T Eisenbarth and B Sunar Cross Processor Cache Attacks ia.cr/2015/1155