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Worst-Case Execution Time analysis 2009-12-03 C Worst-Case Execution Time Analysis Analysis Andreas Ermedahl, Docent Mlardalen Real - Time Research Center (MRTC) Vsters, Sweden andreas.ermedahl@mdh.se 2 What C are w e talking about?


  1. Worst-Case Execution Time analysis 2009-12-03 C Worst-Case Execution Time Analysis Analysis Andreas Ermedahl, Docent Mälardalen Real - Time Research Center (MRTC) Västerås, Sweden andreas.ermedahl@mdh.se 2 What C are w e talking about? Program timing is not trivial! � A key component in the analysis of int f(int x) { real-time systems return 2 * x; } � You have seen it in formulas such as: Simpler questions Harder questions Worst-Case Worst Case Worst-Case Worst Case Response Time Period Execution Time � What is the program � What is the execution doing? time of the program? R i = C i + ∑ ⎡ R i / T j ⎤ C j � Will it always do the � Will it always take the same thing? same time to execute? j ∈ hp(i) � How important is � How important is the result? execution time? Where do these C values come from? 3 4 WCET and WCET analysis Program timing basics � Worst-Case Execution Time = WCET � Most computer programs have varying � The longest calculation time possible execution time � For one program/task when run in isolation � Due to input values � Other interesting measures: BCET, ACET � Due to software characteristics � The goal of a WCET analysis is to derive � Due to hardware characteristics a safe upper bound on a program’s WCET f b d ’ WCET � Example: some timed program runs BCET WCET program runs Most runs have Is this the longest similar execution time execution time... safe possible safe lower execution upper Some take much ... or can we get timing times timing longer time (why?) even longer ones? bounds bounds 0 time execution time 0 5 1

  2. Worst-Case Execution Time analysis 2009-12-03 Presentation outline � Embedded and Real-Time � WCET analysis Embedded � Measurements and � Static analysis � Flow analysis, low-level analysis, and calculation Fl l i l l l l i d l l ti Real-Time � Hybrid approaches � WCET analysis tools � The SWEET approach to WCET analysis � Upcoming challenges � WCET tool demo Embedded computers Embedded systems everyw here � Today, all advanced � An integrated part of a larger system products contain � Example: Each microwave oven holds at least one embedded processor embedded computers! � Example: A modern car can contain more � Our society is dependant on than 100 embedded processors that they function correctly that they function correctly � Interacts with the use, the environment, and with other computers � Often limited or no user interface � Often with some timing constraints input input result result Embedded system hardw are Embedded systems softw are � Amount of software can vary from � Huge variety of embedded extremely small to very large system processors � Gives characteristics to the product � Not just one main processor type as for PCs � Often developed with target � Additionally, same CPU can be used with various hardware in mind hardware configurations (memories, devices, …) g ( ) � The hardware is often tailored � Often limited resources (memory / speed) � Often direct accesses to different HW devices specifically to the application � Not always easily portable to other HW � For example using a DSP processor � Many different programming languages for signal processing � C still dominates, but often special purpose languages � Cross-platform development � Many different software development tools � E.g., develop on PC and download � Not just GCC and/or Microsoft Visual Studio final application to target HW 11 2

  3. Worst-Case Execution Time analysis 2009-12-03 A numerical comparision Real-time systems � Computer systems where the timely � Embedded systems processors clearly behavior is a central part of the function dominate yearly production � Containing one or more embedded computers � 100 million PC processors � Both soft- and hard real-time, or a mixture… � 6000 million embedded Timing of radio Timing of radio Timing of music communication, motor playing from MP3 file control, rudder and flaps control,… "Embedded" 98% Timing of network communication, motor "Desktop" Timing of radio control, ABS brakes, communication, anti-slip control,… 2% speech recognition,… Timely Software - a Challenge 13 June 10, 2005 Uses of reliable WCET bounds � Hard real-time systems � WCET needed to guarantee behavior � Real-time scheduling WCET � Creating and verifying schedules analysis analysis � Large part of RT research assume � Large part of RT research assume the existence of reliable WCET bounds � Soft real-time systems � WCET useful for system understanding � Program tuning � Critical loops and paths � Interrupt latency checking Obtaining WCET bounds � Measurement � Industrial practice Timing measurement measurement � Static analysis � Research front 3

  4. Worst-Case Execution Time analysis 2009-12-03 Measuring for the WCET Measurement issues � Large number of potential worst-case inputs � Methodology: � Program state might be part of input � Determine potential � Has the worst-case path really been taken? ”worst-case input” p � Often many possible paths through a program � Hardware features may interact in unexpected ways � Run and measure � How to monitor the execution? Buzzer � Add a safety margin � The instrumentation may affect the timing � How much instrumention output can be handled? LEDs 19 20 SW measurement methods Using an oscilloscope � Operating system facilities � Common equipment for HW debugging � Commands such as t i m e , dat e dat e and cl ock t i m e cl ock � Used to examine electrical output signals � Note that all OS - based solutions require of HW precise HW timing facilities (and an OS) � Mainly for observing the voltage or signal � Cycle-level simulators waveform on a particular pin � Usually only two to four inputs � Usually only two to four inputs � Software simulating CPU S f i l i CPU � Correctness vs. hardware? � To measure time spent in a routine: � High-water marking 1. Set I/O pin high when entering routine � Keep system running 2. Set the same I/O pin low before exiting � Record maximum time 3. Oscilloscope measures the amount of time that the I/O pin is high observed for task 4. This is the time spent in the routine � Keep in shipping systems, read at service intervals 21 22 Using a logic analyzer HW measurement tools Target board � In-circuit emulators (ICE) � Equipment designed for troubleshooting digital � Special CPU version revealing internals hardware � High visibility & bandwidth � Supportive hardware required � Have dozens or even HW Debugger � Processors with debug support g pp hundreds of inputs hundreds of inputs � Each one keeping track on � Designed into processor whether the electrical signal � Use a few dedicated processor pins it is attached to is currently � Using standardized interfaces at logic level 1 or 0 � Result can be displayed � Nexus debug interfaces, JTAG, against a timeline Embedded Trace Macrocell, … � Supportive HW required � Can be programmed to start capturing data at particular � Common on modern chip input patterns 23 24 4

  5. Worst-Case Execution Time analysis 2009-12-03 Problem of using measurement � Measured value never larger than WCET! Static BCET WCET WCET safe possible safe lower execution upper timing ti i ti times ti timing i analysis bounds bounds time 0 Measurement will result You can never measure in a value ≤ WCET a value > WCET A safety margin must be added! � How much is enough? Again: Causes of Static WCET analysis Execution Time Variation � Do not run the program – analyze it! � Execution characteristics foo(x,i): of the software � Using models based on the static properties of the while(i < 100) software and the hardware if (x > 5) then � A program can often execute � Guaranteed reliable WCET bounds x = x * 2; in many different ways else � Provided all models, input data and analysis � Input data dependencies x = x+2; methods are correct end d � Trying to be as tight as possible � Application characteristics if (x < 0) then � Timing characteristics BCET WCET b[i] = a[i]; end of the hardware All derived i = i+1; safe possible safe bounds will � Clock frequency end lower execution upper be ≥ WCET timing times timing � CPU characteristics bounds bounds � Memories used time 0 � … WCET analysis phases 1. Flow analysis program � Bound the number of times different program parts may Flow Flow be executed (SW analysis) analysis Compiler 2. Low - level analysis analysis analysis L Low level l l Object � Bound the execution time analysis Code of different program parts (HW analysis) Target Calculation 3. Calculation Hardware � Combine flow- and low-level Actual WCET analysis results to derive an WCET bound upper WCET bound Reality Analysis 30 5

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