Bit Error Rate Test of DHPT 1.0 Gigabit Serial Link Leonard Germic , - PowerPoint PPT Presentation

Sep 19, 2022 •313 likes •463 views

Bit Error Rate Test of DHPT 1.0 Gigabit Serial Link Leonard Germic , Carlos Marinas, Hans Krger and Norbert Wermes germic@physik.uni-bonn.de University of Bonn today, 2014 Content Gigabit Serial Link 1 Test Setup 2 Results 3

Bit Error Rate Test of DHPT 1.0 Gigabit Serial Link Leonard Germic , Carlos Marinas, Hans Krüger and Norbert Wermes germic@physik.uni-bonn.de University of Bonn today, 2014
Content Gigabit Serial Link 1 Test Setup 2 Results 3 germic@physik.uni-bonn.de 2 / 12
Gigabit Serial Link of DHPT 1.0 Facts: 1 . 6 GHz differential output programmable preemphasis off-chip 100 Ω matching resistors 1 . 2 V domain (VDD_CML, core voltage) germic@physik.uni-bonn.de 3 / 12
Why preemphasis Compensation of the attenuation of high frequency regime in the signals spectrum due to long distance transmission Increasing bandwidth Preventing single bit error Figure: Signal spectrum with preephasis. germic@physik.uni-bonn.de 4 / 12
Signal generation Preemphasis realization: Subtraction of signal S 1 with delayed signal S 2 . Two 8 bit DACs IDAC_CML_TX_BIAS and IDAC_CML_TX_BIASD One 2 bit DAC pll_cml_dly_sel S 1 ( t ) S 2 ( t ) S 2 ( t + dt ) S 1 − S 2 ( t + dt ) germic@physik.uni-bonn.de 5 / 12
Implementation Current Mode Logic Driver with programmable preemphasis Three parameters: IDAC_CML_TX_BIAS, IDAC_CML_TX_BIASD, pll_cml_dly_sel Same values of IDAC_CML_TX_BIAS and IDAC_CML_TX_BIASD do not correspond to same currents/differential voltage swing (differently sized current mirrors) germic@physik.uni-bonn.de 6 / 12
BERT Test setup 1 x Evaluation board XUPV5 − LX110t as DHH emulator 1 x Evaluation board XUPV5 − LX110t as Bit Error Rate Tester (IBERT, Xilinx) 2 x 15 m Infini band cables ... and a crazy ’handmade’ script germic@physik.uni-bonn.de 7 / 12
Figure: BERT Test system. Top board = DHH emulator, Buttom board = IBERT (Xilinx). germic@physik.uni-bonn.de 8 / 12
BERT Results - Good A and bad B case A B Figure: Red line indicates the BER thr of 10 − 6 germic@physik.uni-bonn.de 9 / 12
Optimal Working Point A B Figure: Sweep results at a threshold of BER thr = 10 − 6 . Higher is better - wider opening at BER thr germic@physik.uni-bonn.de 10 / 12
Optimal Working Point BEST Optimal working point BIAS = 15 , BIASD = 150 , dly = 0. germic@physik.uni-bonn.de 11 / 12
Thank you for your attention! germic@physik.uni-bonn.de 12 / 12
Sweep test These are NOT absolute BER values. NMOS of current mirrors saturate above DAC values ∼ 150 (Design bug) Figure: Plateau due to saturation of the current mirrors. germic@physik.uni-bonn.de 12 / 12

Download Presentation

Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend

DHPT 1.2 Status DEPFET-TB Sep 27. 2016 Status DHPT 1.2 has a major bug: On the 20 bit data

DHPT 1.2 Status DEPFET-TB Sep 27. 2016 Status DHPT 1.2 has a major bug: On the 20 bit data bus connecting the core to the serializer bits D[0], D[18], and D[19] are shorted to ground. The data link puts out invalid symbols rendering

427 views • 11 slides

Hochberg Multiple Test Procedure Under Negative Dependence Ajit C. Tamhane Northwestern

Preliminaries Conservative Simes Test Multivariate Uniform Distribution Models Error Rate Control for n = 2 Error Rate Control Hochberg Multiple Test Procedure Under Negative Dependence Ajit C. Tamhane Northwestern University Joint work with

491 views • 27 slides

PILOT SYSTEM for pxFED upgrade H. STEININGER ( HEPHY Vienna ) Pixel Upgrade Meeting,

PILOT SYSTEM for pxFED upgrade H. STEININGER ( HEPHY Vienna ) Pixel Upgrade Meeting, Grindelwald 30 August, 2012 CONNECTOR overview Test connectors serial link Gigabit Ethernet RUDP SLink replacement JTAG connector for progr. and

453 views • 10 slides

DHPT Link Optimization Leonard Germic University of Bonn July 2016

DHPT Link Optimization Leonard Germic University of Bonn July 2016 germic@physik.uni-bonn.de 1 Virtex 5/6 MGT Receiver specs and BER Height @ BER Width @ BER Width @ BER 1E-12 SP SP -0.5 0 0.5

475 views • 14 slides

Method for analytically calculating BER (bit error rate) in presence of non-linearity Gaurav

Method for analytically calculating BER (bit error rate) in presence of non-linearity Gaurav Malhotra Xilinx Outline Review existing methodology for calculating BER based on linear system analysis. Link model with ISI, Crosstalk,

195 views • 17 slides

Lecture 9: Wireless link layer: Lecture 9: Wireless link layer: error control and wrap-up error

Lecture 9: Wireless link layer: Lecture 9: Wireless link layer: error control and wrap-up error control and wrap-up Mythili Vutukuru CS 653 Spring 2014 Feb 3, Monday Error control Error control in the form of link layer retransmissions

379 views • 6 slides

1 Switch link-layer device: smarter than hubs, take active role store, forward Ethernet

The Data Link Layer Last time Our goals: link layer services understand principles error detection, correction behind data link layer services: multiple access protocols and LANs error detection, correction link layer

302 views • 18 slides

Serial Communications time. 3 4 Serial Interfaces Serial vs. Parallel Different from a

1 2 Serial Interfaces Embedded systems often use a serial interface to communicate with other devices. Serial implies that it sends or receives one bit at a Serial Communications time. 3 4 Serial Interfaces Serial vs. Parallel

225 views • 6 slides

Estimating the Error at Given Test Estimating the Error at Given Test Input Points for Linear

IASTED-NCI2004 Feb. 23-25, 2004 Estimating the Error at Given Test Estimating the Error at Given Test Input Points for Linear Regression Input Points for Linear Regression Masashi Sugiyama Fraunhofer FIRST-IDA, Berlin, Germany Tokyo

336 views • 21 slides

Introduction to Machine Learning Evaluation: Test Error Learning goals training error 0.06

Introduction to Machine Learning Evaluation: Test Error Learning goals training error 0.06 test error Underfitting, Overfitting, High Bias, Low Bias, Understand the definition of test 0.04 Low Variance High Variance MSE error 0.02

394 views • 8 slides

Link Layer 5.1 Introduction and 5.6 Hubs and switches services 5.7 PPP 5.2 Error

Link Layer 5.1 Introduction and 5.6 Hubs and switches services 5.7 PPP 5.2 Error detection 5.8 Link Virtualization: and correction ATM and MPLS 5.3Multiple access protocols 5.4 Link-Layer Addressing 5.5 Ethernet

602 views • 22 slides

Link Layer 5.1 Introduction and 5.6 Hubs and switches services 5.7 PPP 5.2 Error

Link Layer 5.1 Introduction and 5.6 Hubs and switches services 5.7 PPP 5.2 Error detection 5.8 Link Virtualization: and correction ATM 5.3Multiple access protocols 5.4 Link-Layer Addressing 5.5 Ethernet 5:

432 views • 9 slides

SPI Serial Port (in AVR Microcontrollers) Contents Serial communication with SPI Serial

Microprocessors , Lecture 7: SPI Serial Port (in AVR Microcontrollers) Contents Serial communication with SPI Serial communication programming in C Reference: Chapter 17 of the Mazidis book University of Tehran 2 Serial ports

470 views • 30 slides

= I v Network Layer - YEE Tcpoverwireless Last 1 mile . . . BER ( Bit error rate ) -

TCP complete Oct 15 : over wireless TCP - RED TCP - to end bottleneck bandwidth End - estimation ( plat pair ) = I v Network Layer - YEE Tcpoverwireless Last 1 mile . . . BER ( Bit error rate ) - . of hit error much big prob

168 views • 6 slides

Unit D time. Serial Communications D.3 D.4 Serial vs. Parallel Parallel Interfaces Serial

D.1 D.2 Serial Interfaces Embedded systems often use a serial interface to communicate with other devices. Serial implies that it sends or receives one bit at a Unit D time. Serial Communications D.3 D.4 Serial vs. Parallel

174 views • 6 slides

Computer Networks Chapter 2 Data Link Layer Issues CEN 5501C - Computer Networks - Spring

Computer Networks Chapter 2 Data Link Layer Issues CEN 5501C - Computer Networks - Spring 2007 - UF/CISE - Newman 1 LAN Properties Shared medium High data rate Low delay Low error rate Native broadcast support

657 views • 27 slides

Outline of Presentation TOSSIM : Introduction Need for simulating sensor networks

Outline of Presentation TOSSIM : Introduction Need for simulating sensor networks Accurate and Scalable Simulation Requirements for simulating sensor networks of Entire TinyOS Applications TOSSIM Overview Philip Lewis

79 views • 4 slides

Fiber-Optic Communication System pt 30pt Design : al 2018 Munich Workshop 47pt

Security Level: Confidential Spectra as Performance Metrics for Fiber-Optic Communication System pt 30pt Design : al 2018 Munich Workshop 47pt on Information Theory of Optical Fiber 28pt Mathematical and

641 views • 17 slides

of Heal Storms Li-Pin Chang, Sheng-Min Huang, Kun-Lin Chou Speaker : Sheng-Min Huang Embedded

Relieving Self-Healing SSDs of Heal Storms Li-Pin Chang, Sheng-Min Huang, Kun-Lin Chou Speaker : Sheng-Min Huang Embedded Software and Storage Lab National Chiao-Tung University, Taiwan 1 Outline Introduction Heal Storm Virtual

227 views • 18 slides

A Lightweight Statistical Authentication Protocol for Access Control in Wireless LANs Haoli Wang,

A Lightweight Statistical Authentication Protocol for Access Control in Wireless LANs Haoli Wang, Joel Cardo, Yong Guan ECE, Iowa State University ASWN 2004 Introduction Emergence of visitor networks Visitor Networks: LANs that are

671 views • 13 slides

Time-Varying Variable-Length Error-Correcting Codes Victor Buttigieg Johann A. Briffa ISITA

Time-Varying Variable-Length Error-Correcting Codes Victor Buttigieg Johann A. Briffa ISITA 2018, 31 October 2018, Singapore Department of Communications and Computer Engineering University of Malta Msida MSD 2080, Malta Outline

513 views • 27 slides

Design and Analysis of LDPC for MIMO-OFDM Guosen Yue NEC Labs Research Princeton, NJ Joint work

Design and Analysis of LDPC for MIMO-OFDM Guosen Yue NEC Labs Research Princeton, NJ Joint work with Ben Lu Xiaodong Wang (Columbia Univ.) Outline LDPC coded MIMO OFDM Analysis & Optimization of (irregular) LDPC Coded MIMO OFDM

1.79k views • 16 slides

Interfacing, and Tri-States 2 Signal Types Recall even digital signals are just voltages

1 EE 109 Unit 18 Noise Margins, Interfacing, and Tri-States 2 Signal Types Recall even digital signals are just voltages Analog signal Continuous time signal where each voltage level has a unique meaning Digital signal

651 views • 22 slides

Position-Based Quantum Cryptography: Impossibility and Constructions Harry Buhrman, Christian

Position-Based Quantum Cryptography: Impossibility and Constructions Harry Buhrman, Christian Schaffner Serge Fehr Nishanth Chandran, Ran Gelles Rafail Ostrovsky Vipul Goyal CRYPTO 2011 http://arxiv.org/abs/1009.2490 Wednesday, August 17,

461 views • 18 slides