ASTC Structure, Officers and Operations January 31 st 2011 Topics to - - PowerPoint PPT Presentation

ASTC Structure, Officers and Operations

January 31st 2011

Topics to Cover (10:15 am - 10:45 am)

• Revisit ASTC structure and operations
• Introduce ASTC Committee members as well as

system and functional area subgroup constituents

• Introduce project management guidelines

ASTC High Level Goals

• Accelerate the pace of technology innovation to

shorten the time from invention to productization.

• Through sponsorship and management of university projects
• By addressing key, less understood aspects of a given technology

with more fundamental scientific focus.

• Provide a realistic roadmap to guide technology

investments and help focus resources.

• Lead to common solutions whenever possible.

ASTC Membership

Membership Level Criteria Annual Dues Committee Membership Committed Members Tier 1 More than $2B yearly storage revenue $500K One EC member One SC member Two TC members HGST, Seagate, Western Digital, Marvel, Xyratex Tier 2a Between $750M and $2B in yearly storage revenue $250K One SC member One TC member LSI, TI Tier 2b Between $250M and $750M in yearly storage revenue $125K One SC member One TC member Fuji Electric Infra-structure Less than $250M in yearly revenue from storage $50K Intevac, Heraeus, KLA-Tencor, Veeco Partner Universities, national labs and research institutes Free

Estimate $3.5M total membership fees (2011)

ASTC Organizational Structure

Execu2ve Council (EC) Steering Commi=ee (SC) Technical Commi=ee (TC)

Working Groups (WG)

‐ Meet semi‐annually ‐ Define ASTC vision and mission ‐ Approve budget ‐ Approve SC representa2ves ‐ Define projects and make budget recommenda2ons to EC ‐ Select TC and WG members ‐ Meet at least quarterly ‐ Propose projects to the SC ‐ Manage funded projects ‐ Meet at least monthly ‐ Ad‐hoc, organized on an as‐needed basis ‐ Can include non‐TC members (but with no vo2ng rights)

“A three‐level structure with an Execu2ve Council, a Steering Commi=ee, and a Technology Commi=ee ensures that the vision of ASTC remains fresh, and specific ac2vi2es will be 2ghtly managed.”

Executive Council

• The Executive Council sets the vision and mission of

ASTC

• Adjusts and approves budgets as proposed by the

Steering Committee

• Approves representatives for the Steering

Committee.

Steering Committee

• The Steering Committee (SC) is responsible for project

definition, execution, and oversight.

• It is responsible for recommendations to the EC on new programs,

changes to existing projects, and adjustments to scope, scale, and budgets.

• SC is charged with the compilation and summarization of project

activities, goals, and achievements for the EC.

• SC is responsible for vetting and appointing Technology

Committee (TC) members, and for approving technical projects.

• Tier 1 and Tier 2 member companies can have one

representative on the Steering Committee.

Technology Committee

• The Technology Committee (TC) will generate project proposals for

SC action and approval.

• Individual projects will reside within the Technology Committee, making it the direct

interface between ASTC and universities.

• Projects will have team leaders and other industry personnel to

manage universities and research partners, project definition, execution, and oversight.

• Meetings will be held monthly (at a minimum). The TC will be

responsible for conducting ASTC’s review meetings.

• Face-to-face meetings will be interspersed with telephone

conference/video conference meetings.

Working Groups

HAMR BPR TDMR MAMR

…

Heads Media Signal Processing Servo-Mechanics Head-Disk Interface

Func2onal Working Groups System Working Groups

Role of System Working Groups:

• Define funding priori5es for projects for each system area, and guide selec5on of projects.
• Ensure a coordinated porAolio of projects for each system area.
• Oversee ac5vi5es in associated func5onal areas.
• Define roadmaps for each system area.

Role of Func2onal Working Groups:

• Management of university research projects across each func5onal area.
• Generate periodic status reports and summaries, and provide feedback to universi5es.
• Manage project proposal process within each func5onal area, subject to funding priori5es

and guidance provided by system area working groups.

ASTC Funded Project Management Guidelines

• ASTC system level groups will recommend which technology areas within each system

to pursue or priori2ze

• The func2onal subgroups of the Technical Commi=ee will agree on a Statement of

Work (SOW) with each lead university researcher.

– The SOW should include/address:

• Problem to be solved
• Main direc5on/approach of research to be taken
• Expected deliverables/outcome
• Frequency of mee5ngs and conference calls

– Projects will be subjected to check gates and their progress evaluated against:

• Progress toward goals
• Relevant knowledge crea5on
• IP genera5on
• Spin‐off of new ideas
• Measure against new alterna5ves
• Time to closure

• Meeting Frequency – Monthly teleconference with Professors and

Students

• Project Leadership – Rotating basis (suggested 6 months)
• TC Feedback to SC - Quarterly reports including recommendations
• n how the project should change if needed
• Project Oversight - Shared by all participating companies
• Face-to-face ASTC Review Meetings - 2 or 3 times a year, (E.g.,

Spring, Fall, Winter)

ASTC Funded Project Management Guidelines

Project Priority Matrix

HAMR BPR TDMR MAMR Adv PMR Recoding Subsystem Heads Media Signal Processing Servo Mechanics HDI Tool Dev

Darker colored cells represent areas where, in principle, more projects will be funded. It does NOT represent probability of funding for project proposals requested.

System Working Group Members and Tasks

Western Digital Hitachi GST Seagate Marvell LSI TI Xyratex BPR Sys Eric Champion, Paul Dorsey Tom Albrecht* Rene van de Veerdonk Michael Madden Jason Goldberg, George Mathew Axel Alegre de la Soujeole Giora Tarnopolsky HAMR Sys Eric Champion, Matt Gibbons* Barry Stipe Jan Thiele Jason Goldberg, George Mathew Axel Alegre de la Soujeole Giora Tarnopolsky TDMR Sys Eric Champion Roger Wood Fatih Erden* Greg Burd Jason Goldberg, George Mathew Axel Alegre de la Soujeole Giora Tarnopolsky MAMR Sys Mike Mallary* Paul van der Heijden Tim Rausch Jason Goldberg, George Mathew Axel Alegre de la Soujeole Giora Tarnopolsky

 System level groups will recommend which technology areas within each system to pursue or priori2ze  Responsible for strawman proposals for roadmap ac2vi2es  Contribute and assist with ASTC funded projects

Functional Working Group Members and Tasks

Functional Areas Western Digital Hitachi GST Seagate Marvell LSI TI Xyratex Fuji Electric Head Jishan Li, Matt Gibbons Paul van der Heijden** Tim Rausch* Jason Goldberg Giora Tarnopolsky Media Kumar Srinivasan, Antony Ajan Dieter Weller* Jan Thiele** Jason Goldberg Giora Tarnopolsky Shinichi Nakazawa Sig Proc Shayan Garani Travis Oening Fatih Erden*, Bill Radich Greg Burd** George Mathew Giora Tarnopolsky Servo Guoxiao Guo Toshiki Hirano Michael Madden Xun Zhang Jason Clark Giora Tarnopolsky Trib Yiao-Tee Hsia*, Bernhard Knigge Bruno Marchon Tom Pitchford** Jason Goldberg Giora Tarnopolsky

 Func2onal area working groups will provide oversight of research projects with ac2ve par2cipa2on from all member companies.  Execute on a project management process for their func2onal areas that conforms to the established guidelines  Provide the SC with quarterly project summary reports on each project.

Executive Council

Cain Bill VP/CTO Western Digital Geenen Mark Chairman IDEMA Goglia Pete

• Sr. VP/CTO

Xyratex Munce Currie

• Sr. VP

Hitachi GST Re Mark

• Sr. VP

Seagate Sutardja Pantas VP/CTO Marvell

Steering Committee

Alegre de La Soujeole Axel TI Bertero Gerardo Western Digital Chen Martin Hitachi GST Doherty Sally LSI Fisher Dan LSI Fujihira Tatsuhiko Fuji Electric Goglia Peter Xyratex Gage Ed Seagate Li Jinshan Western Digital Nakazawa Shinichi Fuji Electric New Richard Hitachi GST Son Kong Xyratex Tarnopolsky Giora Xyratex Wu Zining Marvell

Technology Committee and Contributors

Acharya Ramamurthy Western Digital Ajan Antony Western Digital Albrecht Tom Hitachi GST Alegre de La Soujeole Axel TI Armstrong Alan Marvell Best John Burd Greg Marvell Burkeen Frank KLA Tencor Champion Eric Western Digital Cheng Randy Heraeus Chang Thomas Seagate Clark Jason TI Devasahayam Adrian Veeco Dorsey Paul Western Digital Erden Fatih Seagate Garani Shayan Western Digital Gibbons Matt Western Digital Goldberg Jason LSI Guarisco Davide Western Digital Guo Guoxiao Western Digital Hellwig Olav Hitachi GST Hirano Toshiki Hitachi GST Hsia Yiao-Tee Western Digital Knigge Bernhard Western Digital Lee Yuan Xing LSI Li Jinshan Western Digital Madden Michael Marvell Mallary Mike Western Digital Marchon Bruno Hitachi GST Mathew George LSI Moser Andreas Western Digital Nakazawa Shinichi Fuji Electric Oak Dave KLA Tencor Oates Bob Veeco Oenning Travis Hitachi GST Pitchford Tom Seagate Radich Bill Seagate Rausch Tim Seagate Russak Mike Intevac Stipe Barry Hitachi GST Srinivasan Kumar Western Digital Thiele Jan-Ulrich Seagate Terris Bruce Hitachi GST Vanderheijden Paul Hitachi GST van de Veerdonk Rene Seagate Weller Dieter Hitachi GST Wood Roger Hitachi GST Zhang Xun LSI

Break-Out (Parallel) Sessions

(1:30pm-3:30pm)

AZer lunch we will break into five parallel func2onal area sessions:

• Media
• Heads
• Head/Disk Interface (HDI)
• Signal Processing
• Servo/Control Technology

Topics to be covered in sessions:

• University presenta5ons (project updates)
• Feedback and discussion amongst technical teams and collaborators
• Discussion of func5onal area mission and opera5ons and provide feedback
• n project management guidelines

Break-Out Sessions (1:30pm-3:30pm)

Heads Head-Disk Interface Servo/Control Media Signal Processing