Analytical Cache Models with Applications to Cache Partitioning
- G. Edward Suh, Srinivas
Analytical Cache Models with Applications to Cache Partitioning G. - - PowerPoint PPT Presentation
Analytical Cache Models with Applications to Cache Partitioning G. Edward Suh, Srinivas Devadas, and Larry Rudolph LCS, MIT Motivation Memory system performance is critical Everyone thinks about their own application But modern
But modern computer systems execute multiple applications
Context switches cause cold misses Simultaneous applications compete for cache space
Explicit management of cache space => partitioning Cache-aware job schedulers
Thiébaut and Stone (1987) Agarwal, Horowitz and Hennessy (1989) Both only focus on long time quanta Inputs are hard to obtain on-line
Optimal cache partitioning for very short time quanta
Work for any time quantum Inputs are easier to obtain (possible to estimate on-line)
C: Cache Size Schedule: job sequences with
MA(x): a miss rate as a
Overall miss-rate (OMR) for
Overall Miss Rate MA(x) C Schedule
Cache Size Miss-Rate Miss-Rate Cache Size Miss-Rate
Split the application into phases One MR(size) per phase
The amount of data for Process A at time t starting from an
Φ(0) = 0
Assume only one process executes
If hit,
Φ(t+1) = xA Φ(t)
If miss,
Φ(t+1) = MIN[ xA Φ(t) + 1, C ]
Φ(t) with its
E[xA
Φ(t+1)] = MIN[ E[xA Φ(t)] + PA(t), C ]
Φ(t)] + MA(E[xA Φ(t)]), C ]
MRU Data L R U D a t a
D-1 C-1 B-1
D-3
A-1 C-2 D-2 B-2 A-2
C-3
A0
…
Φ(t)
Φ(t+TA)- xA Φ(t)
t t+TA xA
Φ(t)
Independent Footprint of A Time Blocks
Use independent footprint Until cache is full
MRU Data L R U D a t a
D-1 C-1 B-1
D-3
A-1 C-2 D-2 B-2 A-2
C-3
A0
…
Cache Size (C)
Φ(t+TA)
MRU Data L R U D a t a
D-1 C-1 B-1
D-3
A-1 C-2 D-2 B-2 A-2
C-3
A0
…
Cache Size (C)
Φ(t+TA)
Φ(TD)-xC Φ(TC)- xB Φ(TB)
Process A’s Data xA(t) Other Process’ Data Cache at time t Cache Size MA(x) PA(t) Miss-Rate xA(t)
In a steady-state, all time
Time starts (t=0) at the
A
T A A A
Probability to Miss Integrate The number of misses PA(t) Time TA
Φ(t)
Φ(t)
=
N i i i sum
1
A
T A A
)) ( ( )] ( [ )] 1 ( [ t x M t x E t x E
A A A A Φ Φ Φ
+ = +
0.03 0.032 0.034 0.036 0.038 0.04 0.042 0.044 20000 40000 60000 80000 100000 Time Quantum Miss-rate Simulation Model
0.04 0.045 0.05 0.055 0.06 0.065 0.07 20000 40000 60000 80000 100000 Time Quantum Miss-rate Simulation Model
Cache blocks that only Process A can use
Cache blocks that any process can use while it is active
0.02 0.025 0.03 0.035 0.04 0.045 0.05 1 10 100 1000 10000 100000 1000000 Time Quantum Miss-rate LRU Partition
25% miss-rate
7% improvement
Count the number of cache blocks for each process (XA) Try to match XA to the allocated cache space Replacement (Process A active)
Replace Process A’s LRU block if Replace Process B’s LRU block if Replace the standard LRU block if there is no over-allocated
A A
B B
0.02 0.025 0.03 0.035 0.04 0.045 0.05 1 10 100 1000 10000 100000 1000000 Time Quantum Miss-rate LRU Partition
15% miss-rate
4% improvement