An Introduction to BORPH Hayden Kwok-Hay So University of Hong - - PowerPoint PPT Presentation

An Introduction to BORPH

Hayden Kwok-Hay So University of Hong Kong Aug 2, 2008 CASPER Workshop II

• Language
• Design Environment
• Applications
• OS
• Language
• Design Environment
• Applications
• OS
• System

Integration

• System

Integration Software Hardware

BORPH

 Berkeley Operating system for ReProgrammable

Hardware

 OS for reconfigurable computers

 Treats reconfigurable hardware as computational

resources

 UNIX interface to HW designs

 Familiar to both software and hardware engineers  Design language independent

 Goal:

Make FPGA-based reconfigurable computers easy to use

User Process (SW)

OS Kernel

User Process (SW) User Process (SW)

User Library Hardware Platform (Network, UART, HD…) file IPC Device Driver Software Hardware socket pipe

FPGA

Master-Slave Relationship

“coprocessor”

User Process (SW) User Process (SW) User Process (SW)

Hardware Platform (Network, UART, HD…) Device Driver

User Process (HW) User Process (HW)

Hardware User Library BORPH Kernel Software Hardware User Library file IPC socket pipe ioreg virtual file

Peer-to-Peer Relationship

 Hardware process  Hardware syscall

interface

 Interacting with an FPGA

 ioreg virtual file interface  Hardware file I/O

SW SW SW

Hardware Platform (Network, UART, HD…) Device Driver

HW HW

Hardware User Library BORPH Kernel

Software Hardware

User Library

file IPC

socket

pipe ioreg

 An executing instance of

a hardware design

 SW: An executing instance

• f a program

 Normal UNIX process

 Has pid, check status with

ps, kill, etc

 Unit of management  Created when a BORPH

Object File (BOF) file is exec-ed

 Kernel selects and

configure hardware region automatically

SW SW SW

Hardware Platform (Network, UART, HD…) Device Driver

HW HW

Hardware User Library BORPH Kernel

Software Hardware

User Library

file IPC

socket

pipe ioreg

SW SW SW

Hardware Platform (Network, UART, HD…) Device Driver

HW HW

Hardware User Library BORPH Kernel

Software Hardware

User Library

file IPC

socket

pipe ioreg

 Standard UNIX I/O

mechanism

 File I/O, pipe, signal

 I/O managed by kernel

 Similar to SW

 Hide details from users

 e.g. HW-SW, HW-HW

UNIX file pipe

 HW specific service

 ioreg virtual file system

Don’t ask “How do I … in HW”. Think: “What if it were SW?”

SW SW SW

Hardware Platform (Network, UART, HD…) Device Driver

HW HW

Hardware User Library BORPH Kernel

Software Hardware

User Library

file IPC

socket

pipe ioreg

 Fixed, generic kernel/user

interface

 Control + Data  Natural (Partial)

Reconfiguration boundary

 Packet-based, high-level

handshaking protocol

 Error Handling  Incomplete read/write

 Provides all system

functions

 sys_read, sys_write  sys_greet, sys_exit

hsc_dout hsc_dout_f hsc_din hsc_din_f hsc_rdy

Read Request Size Read Ack Size Payload

 Similar to <stdio.h>

in C language

 Handles

communicating protocol with the kernel

 Example:

 BORPH File Stream I/

O (bfsio) Library

 Read: bfsio_r  Write: bfsio_w

SW SW SW

Hardware Platform (Network, UART, HD…) Device Driver

HW HW

Hardware User Library BORPH Kernel

Software Hardware

User Library

file IPC

socket

pipe ioreg

hsc1_dout hsc1_dout_f hsc1_din hsc1_din_f hsc1_rdy D F EOF hsc2_dout hsc2_dout_f hsc2_din hsc2_din_f hsc2_rdy D F rdy flush

bfsio_r bfsio_w User Design

 Maps user defined hardware constructs as virtual files

under the process’s /proc/<pid>/hw/ioreg/ directory

 Single word register  Memory: On-chip + Off-chip  FIFO

 Example:

 /proc/123/hw/ioreg/COUNTERVAL

 ioreg information embedded in the executing BOF file  read and write system calls translated to message

packet by the kernel

 Any UNIX program can communicate with hardware processes

 Shell: echo 1 > /proc/123/hw/ioreg/enable  C: MEM_FILE =  fopen(“/proc/123/hw/ioreg/MyMemory”, “r”);  fread(swbuf, 1, MEM_SIZE, MEM_FILE);  Python, Java, etc…

HWR BORPH Kernel

cnten cntval counter en val

Message Parsing

1 ./counter.bof & [1] 2458 ps PID TTY TIME CMD 2456 pts/4 00:00:00 bash 2458 pts/4 00:00:00 counter.bof 2507 pts/4 00:00:00 ps cat /proc/2458/hw/ioreg/cntval A3B498E0 cat /proc/2458/hw/ioreg/cntval B289E906 echo 0 > /proc/2458/hw/ioreg/cnten cat /proc/2458/hw/ioreg/cntval C102F34D kill -9 2458 [1]+ Killed counter.bof Configured bash$ bash$ bash$ bash$ bash$ bash$ bash$ bash$ counter.bof

 Access to the general file system from hardware

processes

 Debug by printing

 printf

 Read test vectors, record output  SW/HW processes chained by file pipe

Baseband Process

A/D

Analog Frontend Upper Layer Decode Resize Edge Detect Encode video.in video.out

bash$ decode video.in | resize | edgdet.bof | encode > video.out bash$ receiver.bof < file.in > file.out

 Simulink: A block based

design environment on top of Matlab

 Familiar to communication/

protocol designers

 Cycle-accurate, bit-

accurate simulation in Simulink

 Single-button to

implementation

 Based on Xilinx System

Generator

 In-house library for BEE2

specific blocks

 I/O  BORPH integration

counter.bof System Insertion Block Instantiation Synthesis, Map, Place & Route Config Generation

 BORPH on PowerPC

• f center control

FPGA

 1 user FPGA

programmed for each hardware process

 Based on Linux

2.4.30 kernel

 Software reuse  Debian root filesystem

BORPH User Design User Design User Design User Design

SelectMap MGT Direct Conn Ethernet

 Bus mastering DMA controller on Control FPGA

 Improve configuration and data transfer

 Direct HW access to SelectMap FIFO on User

FPGA

 Improved File I/O speed

SelectMap Control

PLB-OPB Bridge

PPC Memory Controller Ethernet Controller Control FPGA

PLB-OPB Bridge

PPC On-Chip Memory User FPGA ioreg ioreg Shared BRAM Shared FIFO

SelectMap FIFO

User Design

DMA Cntrl A bfsio iock

 1 AMCC PowerPC

440 EPx

 1 Xilinx V5 FPGA  BORPH runs on PPC

 v2.0

 1 hardware process

at a time

BORPH User Design

MGT Direct Conn Gb Ethernet

 Based on Linux 2.6.25 kernel

 Future proof

 Modular

 Easy to port to different platforms  e.g. Implementing ioreg interface for a new

platform requires only 6 functions.

 Many ports planned:

 Backport to BEE2  PC Desktop with FPGA card

 BORPH is here, ready to use

 Free, open source  If you know Linux, you can use it

 BORPH is extensible

 Able to run on anything that runs Linux

 BORPH is more than a way to do I/O

 Covers all aspect of reconfigurable computing