An Introduction to BORPH Hayden Kwok-Hay So University of Hong Kong Aug 2, 2008 CASPER Workshop II
• Language • Design Environment • Applications • OS • System Integration Hardware Software • Language • Design Environment • System • Applications Integration • OS BORPH
Berkeley Operating system for ReProgrammable Hardware OS for reconfigurable computers Treats reconfigurable hardware as computational resources UNIX interface to HW designs Familiar to both software and hardware engineers Design language independent Goal: Make FPGA-based reconfigurable computers easy to use
User Process User Process User Process (SW) (SW) (SW) pipe socket User Library Software file Master-Slave IPC OS Kernel Relationship Device Driver Hardware Hardware Platform (Network, UART, HD…) FPGA “coprocessor”
Peer-to-Peer User Process User Process User Process Relationship (SW) (SW) (SW) User Library Software pipe IPC socket file ioreg BORPH Kernel virtual file Device Driver Hardware Hardware User Library Hardware Platform (Network, UART, HD…) User Process User Process (HW) (HW)
Hardware process SW SW SW Hardware syscall User Library pipe IPC socket interface Software file BORPH Kernel ioreg Interacting with an FPGA Device Driver ioreg virtual file interface Hardware User Library Hardware Hardware Platform Hardware file I/O (Network, UART, HD…) HW HW
An executing instance of a hardware design SW SW SW SW: An executing instance of a program User Library pipe IPC socket Normal UNIX process Software file BORPH Kernel ioreg Has pid, check status with Device Driver ps , kill , etc Hardware User Library Unit of management Hardware Hardware Platform (Network, UART, HD…) HW HW Created when a BORPH Object File (BOF) file is exec -ed Kernel selects and configure hardware region automatically
Standard UNIX I/O mechanism SW SW SW File I/O, pipe, signal I/O managed by kernel User Library pipe IPC socket Software file Similar to SW BORPH Kernel ioreg Device Driver Hide details from users e.g. HW-SW, HW-HW Hardware User Library Hardware Hardware Platform UNIX file pipe (Network, UART, HD…) HW HW HW specific service ioreg virtual file system Don’t ask “How do I … in HW”. Think: “What if it were SW?”
SW SW SW Fixed, generic kernel/user User Library interface pipe IPC socket Software file BORPH Kernel Control + Data ioreg Device Driver Natural ( Partial) Reconfiguration boundary Hardware User Library Hardware Platform Hardware Packet-based, high-level (Network, UART, HD…) HW HW handshaking protocol Error Handling Read Request Incomplete read/write Size hsc_dout Provides all system hsc_dout_f hsc_din functions Read Ack hsc_din_f Size hsc_rdy sys_read, sys_write sys_greet, sys_exit Payload
SW SW SW Similar to <stdio.h> in C language User Library pipe IPC socket Software file BORPH Kernel Handles ioreg Device Driver communicating protocol with the Hardware User Library Hardware Platform Hardware (Network, UART, HD…) kernel HW HW Example: hsc1_dout BORPH File Stream I/ D bfsio_r hsc1_dout_f F hsc1_din O (bfsio) Library EOF hsc1_din_f Read: bfsio_r hsc1_rdy User Design Write: bfsio_w hsc2_dout bfsio_w D hsc2_dout_f F hsc2_din rdy hsc2_din_f flush hsc2_rdy
Maps user defined hardware constructs as virtual files under the process’s /proc/<pid>/hw/ioreg/ directory Single word register Memory: On-chip + Off-chip FIFO Example: /proc/123/hw/ioreg/COUNTERVAL ioreg information embedded in the executing BOF file read and write system calls translated to message packet by the kernel Any UNIX program can communicate with hardware processes Shell: echo 1 > /proc/123/hw/ioreg/enable C: MEM_FILE = fopen(“/proc/123/hw/ioreg/MyMemory”, “r”); fread(swbuf, 1, MEM_SIZE, MEM_FILE); Python, Java, etc…
./counter.bof & bash$ [1] 2458 ps bash$ PID TTY TIME CMD BORPH 2456 pts/4 00:00:00 bash counter.bof Kernel 2458 pts/4 00:00:00 counter.bof 2507 pts/4 00:00:00 ps cat /proc/2458/hw/ioreg/cntval bash$ A3B498E0 Message cat /proc/2458/hw/ioreg/cntval bash$ Parsing B289E906 bash$ echo 0 > /proc/2458/hw/ioreg/cnten cat /proc/2458/hw/ioreg/cntval bash$ counter 0 1 HWR cntval cnten C102F34D en val kill -9 2458 bash$ [1]+ Killed counter.bof bash$ Configured
Access to the general file system from hardware processes Debug by printing printf Read test vectors, record output Baseband Analog Upper A/D Process Frontend Layer bash$ receiver.bof < file.in > file.out SW/HW processes chained by file pipe Edge Decode Resize Encode Detect video.in video.out bash$ decode video.in | resize | edgdet.bof | encode > video.out
Simulink: A block based design environment on top of Matlab Familiar to communication/ protocol designers Cycle-accurate, bit- accurate simulation in Simulink Single-button to implementation Based on Xilinx System Generator In-house library for BEE2 specific blocks I/O BORPH integration
System Insertion Block Instantiation Synthesis, Map, Place & Route Config Generation counter.bof
BORPH on PowerPC of center control FPGA 1 user FPGA programmed for each hardware process User User Based on Linux Design Design 2.4.30 kernel Software reuse BORPH Debian root filesystem User User Design Design SelectMap MGT Direct Conn Ethernet
Control FPGA User FPGA Ethernet On-Chip ioreg PLB-OPB PLB-OPB Controller Memory Bridge Bridge User ioreg Design PPC PPC Shared BRAM Memory DMA SelectMap Shared Controller Cntrl Control SelectMap FIFO A FIFO iock bfsio Bus mastering DMA controller on Control FPGA Improve configuration and data transfer Direct HW access to SelectMap FIFO on User FPGA Improved File I/O speed
1 AMCC PowerPC 440 EPx 1 Xilinx V5 FPGA BORPH runs on PPC v2.0 1 hardware process at a time User BORPH Design MGT Direct Conn Gb Ethernet
Based on Linux 2.6.25 kernel Future proof Modular Easy to port to different platforms e.g. Implementing ioreg interface for a new platform requires only 6 functions. Many ports planned: Backport to BEE2 PC Desktop with FPGA card
BORPH is here, ready to use Free, open source If you know Linux, you can use it BORPH is extensible Able to run on anything that runs Linux BORPH is more than a way to do I/O Covers all aspect of reconfigurable computing
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