A Timing Model for Synchronous Language Implementations in Simulink - - PowerPoint PPT Presentation

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A Timing Model for Synchronous Language Implementations in Simulink

Timothy Bourke and Arcot Sowmya School of Computer Science and Engineering University of New South Wales, Sydney and National ICT Australia

tbourke@cse.unsw.edu.au

• EMSOFT 2006

20061125-1244

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Outline

⇒

Simulink and Stateflow An Argos block Timing Model Embedding within Simulink Concluding remarks

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Simulink and Stateflow

• Popular tools
• Practical focus
• Several shortcomings

system clock

feed print pin2 pin1

print motor controller

pin2 output pin1 output

two pulses shaky pulses

Signal Builder

cycle stepper

1 2

stopped rushstart unsynced warmup

• n every(3, TICK).send(step)

[feed==1]/step after(48, TICK) every(10, TICK)[feed==0] [feed==1] slowup print paperfeed rushstop go [feed==1] / step TICK [(feed==1) & (print==1)] [print==0] TICK [feed==0] TICK [(feed==1) & (print==0)]/step TICK [feed=0] after(10, TICK) step11 entry: pin1=1; pin2=1 step01 entry: pin1=0; pin2=1 step00 entry: pin1=0; pin2=0 step10 entry: pin1=1; pin2=0 STEP STEP STEP STEP

Simulation Model-driven Development

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Reasoning about Stateflow designs is complicated:

• 1. intricate ordering rules
• 2. queued event processing
• 3. stacking of communications
• 4. implicit assumption of synchrony

Synchronous languages have better underlying models

(assumption)

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An Argos [Mar91, MR01] block: syncblock [BS05]

• Our first attempt at combining

synchronous languages and Simulink.

• Simulate with Argos

controllers.

system clock tick feed print (clock) pin2 pin1 print motor controller pin2 output pin1 output

two pulses shaky pulses

Signal Builder unsynced feed/step warmup [48 tick] rushstart go.feed stopped feed [3 tick] /step /go [10 tick] go.feed/step slowup tick.feed.print print · · · tick.feed.print/step paperfeed tick.feed rushstop [10 tick] tick.feed print tick.feed.print tick.feed .print/step paperfeed step/pin2 step step/pin1 step/pin1, pin2

step11

step/pin1, pin2

step01

step/pin2

step00

step

step10

step/pin1

• integrate rather than extract
• simulate sync. programs

aside: [CCM+03, SSC+04]

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syncblock: simulating embedded controllers

• Original Prototype: perfect synchrony

– Block outputs appear simultaneously with inputs. – i.e. in the same Simulink step.

• But, Simulink normally models timing detail.

consider: dedicated embedded controllers aim: provide simulation runs with low-level timing detail.

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syncblock: simulating synchrony

internal: (semantics) external: (observable) perfect synchrony e.g. Stateflow syncblock

• Revised approach: simulate implementation delays.

– Internally: synchronous semantics. – Externally: delay between inputs and outputs.

• Necessary to latch inputs and outputs, and to schedule reactions.

– Effectively modelling part of the platform (if abstractly).

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reaction instant reaction computation

• utput

instant

ti ti + δout ti+1 ti+1 + δout τ Idealised parameters

• event-driven or sample-driven: mode
• Delay between input and output: δout
• Minimum pause between reactions: τ
• Program + Limitations

=

Simulation (block)

=

Implementation (model)

aside: TAXYS [STY03]

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Outline

√

Simulink and Stateflow

√

An Argos block

⇒

Timing Model Embedding within Simulink Concluding remarks

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Transformation to Timed Automata

fix:

AB = S, s0, I, O, T trigger ∈ {sample, event} τ ∈ Q+ δout ∈ Q+

requiring:

δout ≤ τ trigger = event ∨ τ > 0

then define:

Atrigger

τ,δout

= Σ, L, L0, C, E:

[AD94]

• Σ = I

.

∪ O

.

∪ {react}

• L = (S

.

∪ {startup}) × P(I) × P(O) × B

• L0 = {(startup, ∅, ∅, ff)}
• C = {x}
• E is the smallest set defined by the conjunction of 9 transition rules.

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(almost) ABRO [Ber00]: in Argos

ABRO(a, b, r)(o)

a/l1 /l1 b/l2 /l2 l1 · l2 · ¬r/o r r l1, l2

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(almost) ABRO [Ber00]: in Argos

ABRO(a, b, r)(o)

a/l1 /l1 b/l2 /l2 l1 · l2 · ¬r/o r r l1, l2

1 loop 2 [ 3 await a 4 || 5 await b 6 ]; 7 emit o 8 each r

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(almost) ABRO: Labelled Transition System a · ¬b · ¬r ¬a · b · ¬r a · b · ¬r/o b · ¬r/o a · ¬r/o r, ¬a · ¬b ¬b · ¬r ¬a · ¬r ¬r r r r

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(almost) ABRO: Timed Transition System a · ¬b · ¬r ¬a · b · ¬r a · b · ¬r/o b · ¬r/o a · ¬r/o r, ¬a · ¬b ¬b · ¬r ¬a · ¬r ¬r r r r

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(almost) ABRO: Timed Transition System a · ¬b · ¬r ¬a · b · ¬r a · b · ¬r/o b · ¬r/o a · ¬r/o r, ¬a · ¬b ¬b · ¬r ¬a · ¬r ¬r r r r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r

x > 0

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(almost) ABRO: Timed Transition System b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r

x > 0

trigger = sample

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(almost) ABRO: Timed Transition System b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r

x > 0 react, x = τ, x := 0

trigger = sample

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(almost) ABRO: Timed Transition System b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r

x > 0 react, x = τ, x := 0

b r b r a r a ab a b r

• x = δout

trigger = sample

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(almost) ABRO: Timed Transition System b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r b r b r a r a ab a b r

x > 0 react, x = τ, x := 0

b r b r a r a ab a b r

• x = δout

trigger = sample

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Event-driven triggering trigger = event b r b r a r a ab a b r b r b r a r a ab a b r react, x = τ, x := 0 react, x = 0 x ≤ τ x = 0 x > τ, x := 0

• Input events during a reaction must wait until x = τ
• Otherwise, they trigger a reaction urgently [BST97]

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Outline

√

Simulink and Stateflow

√

An Argos block

√

Timing Model

⇒

Embedding within Simulink Concluding remarks

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Embedding within Simulink

simulation inputs

event detection input latch

• sync. kernel
• utput latch
• utput

sustain

t

simulation time

triggering

simulation outputs latch react latch reset input

One block or many?

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Embedding within Simulink

Adopt a semantics for Simulink – Simulation Engine – Intent of models Translate models e.g. to Lustre Interactions of block mix conceptual and low-level operations

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Mathworks Bang-bang temperature controller

Argos bang-bang controller SEC reference temp LED boiler

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temperature set point 1 sec Timer

• n/off

actual temp digital temp Boiler Plant model LED {OFF=0, RED=1, GREEN=2} BOILER CMD {OFF=0, ON=1} TEMP (deg C) syncblock syncblock

<=

COLD 1 SEC 2 reference 3 temp 1 LED 2 boiler + + +

[5 SEC] [5 SEC] / LED RED / LED RED [40 SEC] / onOk SEC / LED GREEN SEC

¬SEC / LED GREEN

[20 SEC] / BOILER ON COLD.onOk / BOILER ON

¬COLD

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Simulink simulation engine: initialization

Argos bang-bang controller SEC reference temp LED boiler

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temperature set point 1 sec Timer

• n/off

actual temp digital temp Boiler Plant model LED {OFF=0, RED=1, GREEN=2} BOILER CMD {OFF=0, ON=1} TEMP (deg C)

• 1. Flatten model

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Simulink simulation engine: initialization

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temperature set point 1 sec Timer syncblock syncblock

<=

COLD + + + Data Type Conversion 1 (boolean) Switch 1 heating rate

• 0.1

cooling rate 1/25

1 s

digital thermometer temp digital temp

• 1. Flatten model

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Simulink simulation engine: initialization

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temperature set point 1 sec Timer syncblock syncblock

<=

COLD + + + Data Type Conversion 1 (boolean) Switch 1 heating rate

• 0.1

cooling rate 1/25

1 s

digital thermometer temp digital temp

1 2 3 4 5–9 10 11 12 13 14 15 16

• 1. Flatten model
• 2. Order by signal dependencies.

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Simulink simulation engine: initialization

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temperature set point 1 sec Timer syncblock syncblock

<=

COLD + + + Data Type Conversion 1 (boolean) Switch 1 heating rate

• 0.1

cooling rate 1/25

1 s

digital thermometer temp digital temp

1 2 3 4 5–9 10 11 12 13 14 15 16

• 1. Flatten model
• 2. Order by signal dependencies.
• 3. Start at t = 0.
• 5. Visit each block—maybe several times.
• 6. Increase t—depends on solver.
• 7. repeat from step 5

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Behaviour of syncblock

syncblock

y = fo(t, x, u)

• utputs

x′

d = fu(t, x, u)

update

xc previous clock value xtp previous sample time

• Two predicates: react and emit.
• Instants of interest:

– sample-driven:

δout = τ [τ, 0]

• therwise

[τ, 0] and [τ, δout]

– event-driven:

τ = 0

inherited

• therwise

zero-crossings

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Effect of parameters

5 10 15 20 100 200 300 400 500 600 700 800 simulation time Bang-bang Controller: Stateflow Temperature LED BOILER

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Effect of parameters

5 10 15 20 100 200 300 400 500 600 700 800 simulation time Bang-bang Controller: Stateflow Temperature LED BOILER

0.2 0.4 0.6 0.8 1 1.2 1.4 78 78.5 79 79.5 80 80.5 81 81.5 82

δout = 0.3

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Summary

√

Simulink and Stateflow

√

An Argos block

√

Timing Model

√

Embedding within Simulink

⇒

Concluding remarks

• Working prototype uses Argos.
• Timed automata framework clarifies implementation.
• Looking for case-studies to evaluate utility.

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Concluding remarks

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References

[AD94] Rajeev Alur and David L. Dill. A theory of timed automata. Theoretical Computer Science, 126(2):183–235, April 1994. [Ber00] G´ erard Berry. The Esterel v5 Language Primer. Ecole des Mines and INRIA, version 5.92 edition, June 2000. [BS05]

• T. Bourke and A. Sowmya. Formal models in industry standard tools: An Argos block within
• Simulink. In Francis E.H. Tay, editor, Int. J. Software Engineering and Knowledge Engineering:

Selected Papers from the 2005 International Conference on Embedded and Hybrid Systems, volume 15, pages 389–395, Singapore, April 2005. World Scientific. [BST97] S´ ebastien Bornot, Joseph Sifakis, and Stavros Tripakis. Modeling urgency in timed systems. In Willem P . de Roever, Hans Langmaack, and Amir Pnueli, editors, International Symp. Compositionality: The Significant Difference (COMPOS ’97), volume 1536 of Lecture Notes in Computer Science, pages 103–129, Bad Malente, Germany, September 1997. Springer-Verlag. [CCM+03] Paul Caspi, Adrian Curic, Aude Maignan, Christos Sofronis, Stavros Tripakis, and Peter Niebert. From Simulink to SCADE/Lustre to TTA: a layered approach for distributed embedded

• applications. In Proc. 2003 ACM SIGPLAN Conference on Languages, Compilers, and Tools for

Embedded Systems (LCTES ’03), pages 153–162. ACM, ACM Press, 2003.

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[Mar91]

• F. Maraninchi. The Argos language: Graphical representation of automata and description of

reactive systems. In Proc. IEEE Workshop on Visual Languages, pages 254–259, October 1991. [MR01] Florence Maraninchi and Yann R´

• emond. Argos: an automaton-based synchronous language.

Computer Languages, 27(1–3):61–92, 2001. [SSC+04] N. Scaife, C. Sofronis, P . Caspi, S. Tripakis, and F . Maraninchi. Defining and translating a “safe” subset of Simulink/Stateflow into Lustre. In G. Buttazzo, editor, Proc. 4th ACM International Conference on Embedded Software (EMSOFT’04), pages 259–268, Pisa, Italy, September

• 2004. ACM, ACM Press.

[STY03] Joseph Sifakis, Stavros Tripakis, and Sergio Yovine. Building models of real-time systems from application software. Proc. IEEE, 91(1):100–111, January 2003.