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A time-triggered implementation model for real-time distributed systems Virginia Papailiopoulou Dumitru Potop-Butucaru Yves Sorel INRIA Paris-Rocquencourt SYNCHRON 2011 Dammarie-les-Lys, France November 28th - December 2nd 2011 Outline


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SLIDE 1

November 28th - December 2nd 2011

A time-triggered implementation model for real-time distributed systems

Virginia Papailiopoulou Dumitru Potop-Butucaru Yves Sorel INRIA Paris-Rocquencourt SYNCHRON 2011 Dammarie-les-Lys, France

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SLIDE 2

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Outline

  • Motivation

– Avionics embedded computing systems – Integrated Modular Avionics (IMA)

  • ARINC 653 overview

– Focus on temporal aspects

  • Time-triggered implementation model

– Reservation/Scheduling tables

  • Proposition: time-triggered IMA

– Time-triggered IMA implementation

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SLIDE 3

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Outline

  • Motivation

– Avionics embedded computing systems – Integrated Modular Avionics (IMA)

  • ARINC 653 overview

– Focus on temporal aspects

  • Time-triggered implementation model

– Reservation/Scheduling tables

  • Proposition: time-triggered IMA

– Time-triggered IMA implementation

3

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SLIDE 4

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France 4

Integrated Modular Avionics (IMA)

  • Better use of hardware resources
  • Lower design/maintenance costs

different criticality levels different safety/ reliability requirements

ARINC 653

robust partitioning 2-level scheduling

LevelA LevelB LevelC

processor

time partitioning

P1 P2 P3

w1 w2 w4

P2

w3

LevelB LevelC LevelA

integration of multiple applications in the same computer data communications with multiplexed network space partitioning static TDM scheduling no unspecified communication no side-effects

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SLIDE 5

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Integrated Modular Avionics (IMA)

  • Inside each partition:

– Partition-level scheduler (L1) within TDM slots allocated by the static scheduler (L0) – Any scheduling policy can be used (RR, EDF , ...) – ARINC 653

  • priority-preemptive L1 scheduler

– easy porting of existing software

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SLIDE 6

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Motivation

  • Inside each partition:

– Partition-level scheduler (L1) within TDM slots allocated by the static scheduler (L0) – Any scheduling policy can be used (RR, RM, EDF , ...) – ARINC 653

  • priority-preemptive L1 scheduler

– easy porting of existing software

  • Dynamic scheduling + static TDM

– many TDM slots of short duration – interruption at the end of TDM slots

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➔ increased cost ➔ worse deadline guarantees

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SLIDE 7

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Proposition

  • Fully static scheduling (L0+L1)

– Time-triggered process scheduling within partition allocated TDM slots

  • Conditional scheduling tables

– Precise start dates – Execution condition

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P1 P1 P2 t1 t2 t3 if c3 then h t4 if c4 then f then f if c1 then f if ¬c1 then g

easy and predictable implementations simple model for complex systems better use of resources automatic generation from data-flow formalisms, e.g. SCADE or Simulink

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SLIDE 8

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Outline

  • Motivation

– Avionics embedded computing systems – Integrated Modular Avionics (IMA)

  • ARINC 653 overview

– Focus on temporal aspects

  • Time-triggered implementation model

– Reservation/Scheduling tables

  • Proposition: time-triggered IMA

– Time-triggered IMA implementation

8

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SLIDE 9

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653

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HW

Partition for Application Software 1 Partition for Application Software 2 Partition for Application Software 3 core module

A P E X O/S

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SLIDE 10

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653

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HW

Partition for Application Software 1 Partition for Application Software 2 Partition for Application Software 3 core module

A P E X O/S

module scheduler (L0) P1(L1) P2(L1) P3(L1)

process1 process2 process3 process1 process2 process3 process1 process2 process3

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SLIDE 11

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653 - Partitions

  • Static allocation of resources

– One partition ↔ one application

  • Static scheduling ➔ TDM

– Fixed time windows ➔ exclusive access to resources – One partition ➔ several windows

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Partition 4

Pa

Major Time Frame (MTFn)

Partition 2 Partition 1

Partition 3 Partition 2

Partition 1

Partition 4 window 1 w2 w3 w4 w5 w6

MTF = k × LCM(Ti, ..., Tn)

TP1

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SLIDE 12

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653 - Processes

  • Application functional behavior
  • Priority preemptive scheduling

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Major Time Frame (MTFn)

Partition 2 Partition 1

Partition 3 Partition 2

Partition 1

Partition 4 Partition 4

Pa

window 1 w2 w3 w4 w5 w6 w1 priority f h g q a h release start duration preemption

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SLIDE 13

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653 - MTF configuration

  • According to partition and process requirements

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40(=MTF) 35 15 5 20 DH DH DG (P1) W1 (P1) W3 (P2) W2 25 DF DF TF=20 dF=5 TH=20 dH=5 TG=40 dG=10

F H G P1 P2

TP1=20 DP1=10 TP2=40 DP2=10 TP1 TP1 DP1 DP1

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SLIDE 14

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653 - MTF configuration

  • Not always unique

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23 40(=MTF) 35 15 3 DF 20 DH DH DG (P1) W1 (P1) W3 (P2) W2 DF 25 TF=20 dF=3 TH=20 dH=5 TG=40 dG=10

F H G P1 P2

TP1=20 DP1=8 TP2=40 DP2=10

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SLIDE 15

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

ARINC 653 - Structure of an implementation

  • Configuration file (for the O/S)

– Module configuration

  • window allocation to partitions
  • memory management
  • module scheduling (window start dates + durations)
  • Main programs

– One for each partition

  • processes creation
  • communication ports creation
  • partition scheduling

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SLIDE 16

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Outline

  • Motivation

– Avionics embedded computing systems – Integrated Modular Avionics (IMA)

  • ARINC 653 overview

– Focus on temporal aspects

  • Time-triggered implementation model

– Reservation/Scheduling tables

  • Proposition: time-triggered IMA

– Time-triggered IMA implementation

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SLIDE 17

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Time-triggered implementation model

  • Periodic non-preemptive execution model
  • Table size = execution cycle duration
  • Operations with disjoint conditions can run concurrently
  • Data dependencies respected
  • No data race

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P1 P2 P3 Bus 1 2 3 4 5 6 7 time resources F1@true F2@inA=true M@true N@inA =false F3@inB =false send(P3,inB)@true send(P1,inA)@true send(P3,inA)@true

non-partitioned non-preemptive

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SLIDE 18

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Outline

  • Motivation

– Avionics embedded computing systems – Integrated Modular Avionics (IMA)

  • ARINC 653 overview

– Focus on temporal aspects

  • Time-triggered implementation model

– Reservation/Scheduling tables

  • Proposition: time-triggered IMA

– Time-triggered IMA implementation

18

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SLIDE 19

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Time-triggered IMA

  • Table size = MTF
  • Each operation oi is associated to a partition Pi
  • Slot reservation for window changes
  • Precomputed preemption

– Allow for operations spanning over several windows – Multiple reservations per operation

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P1 P1 P2 t1 f@c1 g@¬c1 t2 h@c3 t3 f@c f@c4

consistent

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SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

  • For each partition

– One aperiodic process/scheduled operation – One periodic process/slot change – Fixed priorities

  • higher priority given to periodic processes

– Start dates fixed w.r.t. the partition period

Time-triggered implementation

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P1 P1 P2 t1 f@c1 g@¬c1 t2 h@c3 t3 f@c f@c4

APEX

+

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SLIDE 21

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Time-triggered implementation

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PROCESS_ATTRIBUTE_TYPE* dates(int Di){ return {date_name[Di],slot_change, date_stack,HI_PRIO,part_period, date_duration,HARD}; } const SYSTEM_TIME_TYPE slot_offset[DNum]; void init_inter_partition_ports() ; int main() { RETURN_CODE_TYPE ret ; PROCESS_ID_TYPE d_pid ; init_inter_partition_ports() ; for(int i=0;i<OpNum;i++) CREATE_PROCESS(op(i),OP_PID+i,&ret); for(int i=0;i<DNum;i++) { CREATE_PROCESS(dates,&d_pid,&ret); DELAYED_START(d_pid, slot_offset[i],&ret); } SET_PARTITION_MODE(NORMAL,&ret); return 0 ; } #include "local_definitions.c" const int OpNum ; const int DNum ; PROCESS_ATTRIBUTE_TYPE* op(int OPi){ return {op_name[OPi],op_wrapper[OPi],

  • p_stack[OPi],LO_PRIO,0,
  • p_duration[OPi],HARD};

} PROCESS_ID_TYPE OP_PID[OpNum] ; int d_i= DNum-1; void slot_change() { RETURN_CODE_TYPE ret ; d_i = (d_i+1)%DNum ; for(int i=0;i<OpNum;i++) { if((op_start[d_i][i])()) START(OP_PID[i],&ret); else if ((op_resume[d_i][i])()) RESUME(OP_PID[i],&ret); else if ((op_suspend[d_i][i])()) SUSPEND(OP_PID[i],&ret); } }

1 2

scheduler function processes associated to operations processes associated to slot changes and the start dates inter-partition ports creation initializations partition execution # of operations # of start/end dates

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SLIDE 22

SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Time-triggered implementation

  • No preemption ➔ no aperiodic process

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40(=MTF) 35 15 5 20 DH DH DG (P1) W1 (P1) W3 (P2) W2 25 DF DF

#include “local_definitions.c” const int opNum = 2; PROCESS_ATTRIBUTE_TYPE op[opNum]= { {"f", f, 1000, LO_PRIO, 0.020, 0.005, HARD}, {"h", h, 1000, LO_PRIO, 0.020, 0.005, HARD}}; SYSTEM_TIME_TYPE slot_offset[opNum] = {0.005, 0.020} ; PROCESS_ID_TYPE OP_PID[opNum]; int main () { RETURN_CODE_TYPE ret; init_inter_partition_ports(); for(int i=0;i<opNum;i++){ CREATE_PROCESS(op[i],OP_PID+i,&ret); DELAYED_START(OP_PID[i],slot_offset[i],&ret); } SET_PARTITION_MODE(NORMAL, &ret); return (0); }

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SYNCHRON 2011 November 28th-December 2nd - Dammarie-les-Lys, France

Conclusion

  • Future work

– L1 scheduler implementation – Evaluation

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⇓ Automatic synthesis of ARINC-based implementations from data-flow specifications ARINC 653 time partitioning constraints

+

conditional scheduling tables ⇓ fully RT static schedule