1. Steven Bell 2. What you hope to learn 2. How to build a - - PowerPoint PPT Presentation

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1. Steven Bell 2. What you hope to learn 2. How to build a - - PowerPoint PPT Presentation

Welcome to EE 201! Please fi ll out a name tent with the name you prefer to go by. On your notecard write: 1. Your name 1. Steven Bell 2. What you hope to learn 2. How to build a microprocessor. in this course 3. Tim Cook calls me personally 3.


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SLIDE 1

Welcome to EE 201!

Please fill out a name tent with the name you prefer to go by. On your notecard write:

  • 1. Your name
  • 2. What you hope to learn

in this course

  • 3. A wild prediction of the best

possible outcome if your expectations are met.

  • 1. Steven Bell
  • 2. How to build a microprocessor.
  • 3. Tim Cook calls me personally

and asks me to design the next- generation iPhone processor.

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SLIDE 2

EE 201: The magic of microprocessors

Steven Bell 17 January 2019

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SLIDE 3

About me

Bachelor's in Computer Engineering MS/PhD in Electrical Engineering Two summer-long internships

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SLIDE 4

My research

Avnet UltraZed EG with PCIe carrier card 4-camera custom FMC breakout Custom IMX219 camera boards with:

  • Focus
  • Configurable clock
  • 9-axis IMU

fl

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SLIDE 5
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SLIDE 6
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SLIDE 7

Warning!

EE 201 is a brand-new course! There will be problems - please be patient. And let us know how we can improve!

BUMPS AHEAD

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SLIDE 8

About you

  • 1. Your name
  • 2. Somewhere interesting you have been in the last year
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SLIDE 9

What will we learn in EE 201?

Circuits Programming

int main(int argc, char* argv[]){ for(int i = 0; i < 100; i++){ printf("i: %d\n", i); } return(0); }

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SLIDE 10

What will we learn in EE 201?

Circuits Programming

int main(int argc, char* argv[]){ for(int i = 0; i < 100; i++){ printf("i: %d\n", i); } return(0); }

Digital design (EE 201)

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SLIDE 11

Why should you care?

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SLIDE 12

Why should you care?

(one example)

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SLIDE 13

CPU

<100 MHash/sec

GPU

~1 GHash/sec

FPGA

~500 MHash/sec

ASIC

~10 THash/sec 0.5 MHash/J

https://en.bitcoin.it/wiki/Mining_hardware_comparison

2 MHash/J 10,000 MHash/J 20 MHash/J

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SLIDE 14

Wearables Neural-network hardware Network routers

Other applications

Gene matching "Big data" analytics

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SLIDE 15

Custom hardware in the datacenter

Google Tensor Processing Unit Microsoft Catapult Intel FPGA cloud Amazon EC2 F1 FPGA instances In a power-constrained system, performance per watt is performance.

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SLIDE 16

Topic Reading Homework Jan 17 Thursday 1 Welcome and introduction Jan 22 Tuesday 2 Boolean equations, truth tables, and circuits 1.5, 2.1-2.2 Jan 24 Thursday 3 Manipulating boolean equations & minimizing logic 2.3-2.7 Jan 29 Tuesday 4 Multiplexers and FPGAs 2.8 HW 1 due Jan 31 Thursday 5 Timing combinational logic 2.9 Feb 05 Tuesday 6 VHDL for combinational logic 4.1-4.2 HW 2 due Feb 07 Thursday 7 Testing and testbenches 4.3, 4.9 Feb 12 Tuesday 8 Latches and flip-flops 3.1-3.3 HW 3 due Feb 14 Thursday 9 Basic sequential circuits 4.4-4.5, 5.4 Feb 19 Tuesday 10 State machines 3.4 HW 4 due Feb 21 Thursday No class; Monday schedule due to holiday Feb 26 Tuesday 11 Timing sequential logic 3.5-3.7 HW 5 due Feb 28 Thursday 12 Testing sequential logic Mar 05 Tuesday 13 Snow day / review for exam HW 6 due Mar 07 Thursday 14 Midterm exam Mar 12 Tuesday 15 Adders and other combinational circuits 5.1-5.2 Mar 14 Thursday 16 Memory: registers, RAM, and ROM 5.5 Mar 19 Tuesday No class, spring break Mar 21 Thursday No class, spring break Mar 26 Tuesday 17 ARM assembly programming 6.1-6.3 HW 7 due Mar 28 Thursday 18 From assembly to 0s and 1s 6.4-6.9 Apr 02 Tuesday 19 Building a single-cycle processor 7.1-7.3 HW 8 due Apr 04 Thursday 20 A more efficient multi-cycle processor 7.4 Apr 09 Tuesday 21 Even faster: pipelined processors 7.5 HW 9 due Apr 11 Thursday 22 Processor catch-up day Apr 16 Tuesday 23 Techniques for modern processors 7.7-7.8 HW 10 due Apr 18 Thursday 24 Digital peripherals and protocols 9.1-9.3.4.1 Apr 23 Tuesday 25 Caching 8.1-8.3 HW 11 due Apr 25 Thursday 26 Virtual memory 8.4-8.5 May 09 Thursday Final exam, 3:30-5:30pm

Combinational logic VHDL and FPGAs Sequential logic Going faster Building a computer

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SLIDE 17

Device policy

Please put away laptops and cell phones except when you need them to solve a problem or answer a poll.

Duncan et al., 2012 Digital Devices, Distraction, and Student Performance: Does In-Class Cell Phone Use Reduce Learning? http://casa.colorado.edu/~dduncan/wp/wp-content/uploads/AER010108.pdf Ravizza et al., 2014 Non-academic internet use in the classroom is negatively related to classroom learning regardless of intellectual ability https://www.sciencedirect.com/science/article/pii/S0360131514001298

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SLIDE 18

Office hours

OH are for everyone! Walking office hours are an experiment - come join!

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SLIDE 19

I want everyone to succeed in this class! We're going to cover a lot of ground, and it will be challenging, but you have what it takes! If you're falling behind, change something! Rarely does "working harder" solve the problem. We'll evaluate your learning based on what you can do, not on a curve against each other.

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SLIDE 20

A word on stereotypes

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SLIDE 21

The digital abstraction

We handle complexity with abstraction. And we enable abstractions by making restrictions. The first fundamental one is the "digital abstraction"

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SLIDE 22

By the end of class today, you should be able to:

Add numbers in binary Write a positive decimal number in binary and vice-versa Represent negative numbers using 2's complement

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SLIDE 23

Decimal to binary

(one of several ways) If the number is odd, write a 1 and subtract 1 from the number If the number is even, write a 0 Divide the number by 2 and repeat

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SLIDE 24
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SLIDE 25

0000 0011 0001 0010 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

binary integer

  • verflow!
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SLIDE 26

0000 0011 0001 0010 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6 -7 -8

binary unsigned signed signed overflow unsigned overflow

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SLIDE 27

To write a negative number in 2's complement: Write the positive number in binary Flip all the bits (1→0, 0→1) Add 1 (with all the appropriate carries) To convert negative 2's complement to decimal, Flip all the bits (1→0, 0→1) Add 1 (with all the appropriate carries) Write the number in decimal

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SLIDE 28
  • 1. Read the book (1.5, 2.1-2.2) and complete the pre-class quiz

For next Tuesday

Quiz is due at 9AM the day of class, so I can review it cp /ee/201/public_html/quizzes/quiz_01.txt ./ provide ee201 q1 quiz_01.txt www.ece.tufts.edu/ee/201/