What is happening with IEEE P1581? Heiko Ehrenberg P1581 working - - PowerPoint PPT Presentation

what is happening with ieee p1581
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What is happening with IEEE P1581? Heiko Ehrenberg P1581 working - - PowerPoint PPT Presentation

What is happening with IEEE P1581? Heiko Ehrenberg P1581 working group chair GOEPEL Electronics IEEE P1581 What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/ Purpose IEEE Std. 1581 will make you forget you ever had a


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SLIDE 1

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

What is happening with IEEE P1581?

Heiko Ehrenberg P1581 working group chair GOEPEL Electronics

IEEE P1581

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SLIDE 2

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Purpose

“IEEE Std. 1581 will make you forget you ever had a memory problem”

Bob Russell

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SLIDE 3

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Outline

  • Why do we need P1581?
  • How does P1581 work?
  • What are possible implementations ?
  • What is the impact on Board level test?
  • Current status of development
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SLIDE 4

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Why do we need P1581?

  • DDR-SDRAM, DDR2-SDRAM, FLASH, etc.

➔ 1149.1 not built in ! ➔ Controllability ➔ Complexity ➔ Test time ➔ Test conditions

(use of untested resources to test the DUT)

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SLIDE 5

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

How does P1581 work?

PCB

Micro Controller,

  • r other

host device IEEE Std. P1581 device

Memory Controller Test Control TTM

(optional)

Memory Cells

Input bus Output bus

Test Pin (if no TTM) Combinational Test Logic x y

Example: memory device

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SLIDE 6

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

P1581 test logic circuitry

  • XOR/XNOR, or Inverters/AND
  • Only combinational, non-sequential logic
  • Easy to implement, simple test vectors
  • Faults on pins don't inhibit test of other pins
  • Fault detection guaranteed
  • Fault diagnostics depends on implementation,

test vectors

  • Patented vs. public domain
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SLIDE 7

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Entering and leaving Test Mode

Test Pin

  • Dedicated test

enable pin

  • Unconditional test

mode access

  • Active state defined

by chip designer

TTM (Transparent Test Mode)

  • No dedicated pin
  • P1581 mode until

first write

  • Not usable for certain

devices (e.g. FLASH)

P1581 test mode

  • utputs = f(inputs)

functional mode write access detected t Power On Power Off

TTM:

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SLIDE 8

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Board level test and P1581

  • Simple, quasi-static interconnect test

(no need for at-speed access or initialization)

  • Multiple P1581 devices in bus structure
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SLIDE 9

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Current status of development

  • Test logic architecture defined; editorial work

remains;

  • Test mode control defined; editorial work

remains;

  • Description language defined
  • Completed draft expected for early 2006

➔ Ballot in 2006

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SLIDE 10

What is happening with IEEE P1581? http://grouper.ieee.org/groups/1581/

Conclusion

  • FLASH device connections not easily testable
  • Synchronous memory devices may cause test

problems

  • P1581 = an elegant solution
  • A perfect match for Boundary Scan

“IEEE Std. 1581 will make you forget you ever had a memory problem”

Bob Russell

Before P1581: Now: