Varying-Speed Processor Sanjoy Baruah and Zhishan Guo Department of - - PowerPoint PPT Presentation

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Varying-Speed Processor Sanjoy Baruah and Zhishan Guo Department of - - PowerPoint PPT Presentation

Scheduling Mixed-Criticality Implicit- Deadline Sporadic Task Systems upon a Varying-Speed Processor Sanjoy Baruah and Zhishan Guo Department of Computer Science, UNC Chapel Hill The Multi-WCET MC Task Model The Liu & Layland (LL)


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Scheduling Mixed-Criticality Implicit- Deadline Sporadic Task Systems upon a Varying-Speed Processor

Sanjoy Baruah and Zhishan Guo Department of Computer Science, UNC Chapel Hill

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The Multi-WCET MC Task Model

  • The Liu & Layland (LL) sporadic task model:

Task τi = (ci, Ti)

– Worst-case execution requirement – Minimum inter-arrival separation (period)

  • WCET-analysis tools may be more or less conservative
  • Example: x := a + b

– 3~321 cycles

ciLO ciHI t Static Analysis Measurement Based

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Other Dimensions -- Periods

  • The Liu & Layland (LL) sporadic task model:

Task τi = (ci, Ti)

– Worst-case execution requirement – Minimum inter-arrival separation (period)

  • Time/Event-triggered periodic tasks

– Fixed/Varying duration between executions – Minimum duration needs to be estimated – Estimations are more or less pessimistic for validating safety-critical or non-critical functions

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Other Dimensions -- CPU Speeds

  • Advanced hardware features

– Main frequency is forced down when ambient temperature is too high, to prevent permanent damage to the chip.

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Other Dimensions -- CPU Speeds

  • Advanced hardware features

– Main frequency is forced down when ambient temperature is too high, to prevent permanent damage to the chip. – Detect if signals are late at the circuit level; and recover by delaying next clock tick.

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Other Dimensions -- CPU Speeds

  • Advanced hardware features

– Main frequency is forced down when ambient temperature is too high, to prevent permanent damage to the chip. – Detect if signals are late at the circuit level; and recover by delaying next clock tick.

  • GALS: Globally Asynchronous Locally Synchronous

– locally synchronous modules that communicate asynchronously – local clocks may be paused, stretched, or data-driven

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SLIDE 7

Previous Work

  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

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SLIDE 8

Previous Work

  • Steve Vestal. Preemptive scheduling of multi-criticality systems

with varying degrees of execution time assurance. RTSS 2007.

  • Alan Burns and Robert I. Davis. Mixed Criticality Systems - A
  • Review. 4th Ed., June 2014. http://www-users.cs.york.ac.uk/burns/review.pdf
  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

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SLIDE 9

Previous Work

  • Sanjoy Baruah and Zhishan Guo. Mixed-criticality scheduling upon

varying-speed processors. RTSS2013.

– Job Set,& dual criticality level – Table driven & LP based – Optimal (w.r.t. processing speeds)

  • Zhishan Guo and Sanjoy Baruah. Implementing Mixed-criticality Systems

Upon a Preemptive Varying-speed Processor. LITES, 1(2):3:1 - 3:19, 2014. – Multiple criticality levels + O(n log n) algorithm for the 2-level case

  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

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This Work

  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

COMBINATION

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This Work

  • Example: Adaptive Variable-Rate Tasks

– The task activation is triggered at specific rotation angles – Varying rotation speeds lead to varying WCETs & periods

  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

COMBINATION

Alessandro Biondi, Alessandra Melani, Mauro Marinoni, Marco Di Natale, Giorgio Buttazzo, Exact Interference of Adaptive Variable-Rate Tasks Under Fixed-Priority Scheduling, ECRTS 2014

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This Work

  • MC implicit-deadline sporadic tasks (multi-WCET)
  • Varying-speed uni-processor
  • Dual-criticality
  • Multiple dimensions to such MC modeling

– upper bound on the execution time of code – lower bound on the processor speed – lower bound on duration between external interrupts (periods) – …

COMBINATION

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Model - Varying-Speed Processor

Clock frequency time

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Model - Varying-Speed Processor

time Clock frequency

ρ 1

Processor speed ≥ 1 Processor speed < 1, but ≥ ρ Processor speed < ρ

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Model - Varying-Speed Processor

Clock frequency

Normal mode Degraded mode Non-functional

time time

ρ 1

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Model - Varying-Speed Processor

Normal mode Degraded mode Non-functional

time

May switch mode at any time

ρ 1

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Model - Varying-Speed Processor

  • It is not a priori known when, or whether, processor

degradation and/or jobs exceeding their LO-WCET estimations will occur (non-clairvoyant).

Normal mode Degraded mode Non-functional

time

May switch mode at any time

ρ 1

ciLO ciHI t

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SLIDE 18

Problem

  • MC sporadic task set

– LO-Criticality Behavior Each job signals completion without exceeding ; – HI-Criticality Behavior Each job signals completion without exceeding , some job does not signal completion after executing .

  • Varying-speed uni-processor

ciLO ciHI

Normal mode Degraded mode Non-functional

ciLO

Processor speed ≥ 1 Processor speed < 1, but ≥ ρ Processor speed < ρ

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SLIDE 19

Correctness

  • MC sporadic task set

– LO-Criticality Behavior Each job signals completion without exceeding ; – HI-Criticality Behavior Each job signals completion without exceeding , some job does not signal completion after executing .

  • Varying-speed uni-processor

ciLO ciHI

Normal mode Degraded mode Non-functional

ciLO

AND

Processor speed ≥ 1 Processor speed < 1, but ≥ ρ Processor speed < ρ

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Correctness

  • MC sporadic task set

– LO-Criticality Behavior Each job signals completion without exceeding ; – HI-Criticality Behavior Each job signals completion without exceeding , some job does not signal completion after executing .

  • Varying-speed uni-processor

ciLO ciHI

Normal mode Degraded mode Non-functional

ciLO

OR

Processor speed ≥ 1 Processor speed < 1, but ≥ ρ Processor speed < ρ

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Contribution & Related work

  • EDF-VD

– Originally designed for Multi-WCET only – [Baruah et al., European Symposium on Algorithms 2011] – [Baruah et al., ECRTS 2012]

  • Multi-WCET + Varying-Speed Processor
  • VDF - Virtual Deadline First

– Non-Monitoring: VDF-NM, VDF-NM+ – Self-Monitoring: VDF-WM – Correctness, Speedup, Schedulability Experiments

Self-Monitoring: the processor “immediately” knows if and when degradation occurs. Extended

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Algorithm - Overview

  • VDF - Virtual Deadline First

– Prior to run-time

  • Schedulability test
  • Virtual deadlines are assigned proportionally to original

deadlines with a common factor x ( 0<x<1 )

– During run-time

  • EDF -- assigned virtual deadlines
  • Revert to original deadlines when a HI-criticality behavior is

detected , and drop LO-criticality tasks

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Algorithm - Example

ρ = 0.5,

I ciLO ciHI pi (di) χi τLO 1 1 2 (2) LO τHI 2 3 10 (10) HI

t

τLO τHI

t 10 20 10 20

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Algorithm - Example

ρ = 0.5, x=0.4

I ciLO ciHI pi (di’) χi τLO 1 1 2 (2) LO τHI 2 3 10 (4) HI

t

τLO τHI

t 10 20 10 20

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Algorithm - Example

  • During Run-Time

– When NO HI-Criticality Behavior is detected…

ρ = 0.5, x=0.4

I ciLO ciHI pi (di’) χi τLO 1 1 2 (2) LO τHI 2 3 10 (4) HI

t 10 20 13

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Algorithm - Example

ρ = 0.5, x=0.4

I ciLO ciHI pi (di’) χi τLO 1 1 2 (2) LO τHI 2 3 10 (4) HI

t 10 20

HI-Criticality Behavior DETECTED at t=13

13

  • During Run-Time

– When HI-Criticality Behavior is detected… time time

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Algorithm - Monitor

ρ = 0.5, x=0.4

I ciLO ciHI pi (di’) χi τLO 1 1 2 (2) LO τHI 2 3 10 (4) HI

t 10 20

HI-Criticality Behavior DETECTED at t=13 for NON-MONITORING system

13

  • During Run-Time

– When HI-Criticality Behavior is detected…

VDF-NM, VDF-NM+ Self-Monitoring: the processor “immediately” knows if and when degradation occurs, which may lead to EARLIER detection of HI-Criticality Behavior VDF-WM

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Algorithm - VDF-NM & VDF-NM+

  • VDF - Virtual Deadline First

– Prior to run-time

  • Schedulability test
  • Virtual deadlines are assigned proportionally to original

deadlines with a common factor x ( 0<x<1 )

t

τLO τHI

t

Task Set with Constrained Deadlines VDF-NM: Density Based Schedulability Test VDF-NM+: PTAS, for any desired degree of accuracy EDF-schedulability checked by binary search of x in (0,1) VDF-WM: Density Based Schedulability Test

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Experiments

VDF-NM: VDF-NM+: VDF-WM:

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SLIDE 30

Experiments

VDF-NM: VDF-NM+: VDF-WM:

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SLIDE 31

Experiments

x

VDF-NM: VDF-NM+: VDF-WM: Among the 1000 generated task sets with utilizations of 0.7, about 66% of them passed the schedulability test for VDF-WM.

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Experiments

VDF-NM: VDF-NM+: VDF-WM:

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Outline

  • Motivation
  • Model
  • Problem Description
  • Algorithm
  • Schedulability Experiments
  • Conclusion and further work
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Conclusion

  • Model

– Multi-WCET mixed-criticality sporadic task set with implicit deadlines – Platforms with varying-speed performance during run-time

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Conclusion

  • Model

– Multi-WCET mixed-criticality sporadic task set with implicit deadlines – Platforms with varying-speed performance during run-time

  • Algorithms

– VDF-NM, VDF-NM+, VDF-WM – Correctness and Sufficient Constraints – Speedup Bound of 1.618 – Schedulability Experiments

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Measurement

  • Speedup Bound
  • Given any MC task system τ

Any Hypothetical Clairvoyant Algorithm

Speed ≥ 1 Speed < 1, but ≥ ρ

Correct

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Measurement

  • Speedup Bound
  • Given any MC task system τ

Algorithm A (with speedup b≥1) Any Hypothetical Clairvoyant Algorithm

Speed ≥ 1 Speed < 1, but ≥ ρ Speed ≥ b Speed < b, but ≥ ρ b

Correct Correct

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Further Work

  • Tightness for speedup bound (1.618)

– Or a smaller speedup bound (1.333) ?

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Further Work

  • Tightness for speedup bound?
  • Multi-Processor

– Heterogeneous System – Define Degraded?

Process speed < 1, but ≥ ρ Zhishan Guo and Sanjoy Baruah. Mixed-criticality scheduling upon varying-speed multiprocessors. EmbeddedCom 2014.

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Clock frequency

Further Work

  • Tightness for speedup bound?
  • Multi-Processor
  • Multiple levels of criticality

– More than two thresholds for processor speeds

time

sn sd sf Normal mode ≥2 Degraded modes Non-functional

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Thank you!

Zhishan Guo zsguo@cs.unc.edu

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Relationship with prior work

  • Multi-WCET task model (previous works)
  • Ji - (ai, di, [ciHI, ciLO], χi)
  • Execution speed = 1
  • Varying-speed model
  • Ji - (ai, di, ci, χi), sn, sd
  • E.g.,

ciLO ciHI t ci t ? t s(t) 1 0.5 ci

ci/sd

t 1 0.5 ci s(t)

ci/sn

t 1 0.5 ci s(t)

A slower processor can be transformed into longer WCET

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Mixed-Criticality

  • Modern safety-critical systems…

– are very complex – are implemented upon non-deterministic platforms – need rigorous correctness proofs

  • Need significant resource over-provisioning, which leads to

highly inefficient resource usage at run-time!

  • Real-time systems should be correct and have efficient

implementations:

  • safety-critical: correctness matters -> rigorous design methodologies
  • resource-constrained platforms: need efficient implementation ->

scheduling theory

  • Scheduling penalty increases with

system complexity -- SWaP

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Mixed-Criticality

  • Modern safety-critical systems…

Need significant resource over-provisioning, which leads to highly inefficient resource usage at run-time!

  • Scheduling theory is applied to models… that are conservative
  • Performance penalties due to being conservative are increasing
  • Critical and non-critical functions co-exist
  • MC Scheduling: two independent analyses of a single system
  • Validate safety-critical functionalities using conservative

approximations

  • Validate all functionalities using less pessimistic approximations
  • x := a + b Best case: 3 cycles

Worst case: 321 cycles

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Mixed-Criticality

  • The analysis of Mixed-Criticality embedded systems has been

identified as one of the core foundational focal areas in the emerging discipline of Cyber-Physical Systems, including:

  • automotive systems;
  • avionics;
  • medical devices
  • intelligent highways;
  • next-generation ATC;
  • smart grid