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Processor Architecture: Current Trends A B Transfer a truckload at - - PowerPoint PPT Presentation
Processor Architecture: Current Trends A B Transfer a truckload at - - PowerPoint PPT Presentation
Processor Architecture: Current Trends A B Transfer a truckload at a time from A to B Processor Architecture: Current Trends A B Make it more powerful Faster: Engine, Lighter, Wheels, .. Bigger: More work per trip Processor
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Processor Architecture: Current Trends A B
Make it more powerful Faster: Engine, Lighter, Wheels, …. Bigger: More work per trip.
Evolutionary improvements in technology reach their limit Frequency Power Pipeline depth Insufficient work
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Processor Architecture: Current Trends
- Instruction Level Parallelism (ILP)
- Concurrency between instructions in a single program
- Application is oblivious to underlying parallelism
- Hardware mechanisms and compiler optimizations
- Simple Instruction Pipelining
- Advanced Pipelining Techniques
- Superscalar and VLIW architectures
- Inflection Point: Current ILP-based designs have reached a plateau
- Power Wall
- Memory Wall
- Implicit Parallelism Wall
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Processor Architecture: Current Trends A B Get a fleet of trucks Increase Throughput Rate of package delivery
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Processor Architecture: Current Trends A B Multiple cores on a chip Cores are simple Great if coordination between cores is small
Get a fleet of trucks
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Processor Architecture: Current Trends
- Explicit Parallelism
Software ( application, compiler, run-time) aware of parallelism
- Data Level Parallelism (DLP)
- Identical operations on elements of large arrays (vectors)
- Vector or Array Processors
- GPUs
- Thread Level Parallelism (TLP)
- Applications with multiple cooperating or independent threads
- Multithreaded Processors
- Chip Multiprocessors
- Process Level Parallelism
- Scalable Multiprocessors, Clusters (Established technology)
- Application Level Parallelism
- Virtualization, Cloud Computing?
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Processor Architecture: Current Trends A B Move a single package from A to B Having multiple trucks does not help Task cannot be obviously parallelized High Performance Scalar Processor Interested in reducing the time for a non-decomposable task Reduce Latency
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Memory Subsystem
- Memory Hierarchy is key to performance
- Latency Hiding
- Caching principles
- Cache organization
- Multi-level caching
- Virtual Memory
- Interaction of Caching and Virtual Memory
- Multiprocessor Cache Coherence
- Memory Consistency
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I/O Subsystem
- Storage : Evolution from Systems to Service
- Direct or Server-Attached Storage:
- Storage devices : Disk Drives, SSDs, MEMS …
- Interconnect protocols (IDE, SATA, SCSI, ..)
- Networked Storage
- Storage Arrays
- Array Virtualization
- Storage Area Networks (SAN), Networked Attached Storage (NAS)
- Protocols: Fiber Channel, iSCSI, RDMA
- Fault Tolerance:
- RAID Arrays, Replication, Erasure Codes for Multiple errors
- Storage as a Service: Amazon S3, Google G-Drive, Apple, …
- Isolation and Performance Guarantees
- Interconnect
- Bus systems
- Point-to-point interconnect
- Switched fabrics
- Cluster interconnects