UMBC A B M A L F T U M B C I O M Y O T R 1 - - PowerPoint PPT Presentation

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UMBC A B M A L F T U M B C I O M Y O T R 1 - - PowerPoint PPT Presentation

Advanced VLSI Design Subsystem Design CMSC 491C/691C Control Control is the hard part of design. The regularity found in arithmetic and memory structures usually not present in control structures. Finite-State machines provide an organized


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SLIDE 1

Advanced VLSI Design Subsystem Design CMSC 491C/691C 1 (November 26, 2000 9:39 pm)

UMBC

U M B C U N I V E R S I T Y O F M A R Y L A N D B A L T I M O R E C O U N T Y 1 9 6 6

Control Control is the hard part of design. The regularity found in arithmetic and memory structures usually not present in control structures. Finite-State machines provide an organized structure for capturing control sequencing and operation. Two types of state machines: Combo inputs

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D Q 1-bit Reg Clk D Q 1-bit Reg Clk clk Logic Moore Machine Combo inputs

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D Q 1-bit Reg Clk D Q 1-bit Reg Clk clk Logic Mealy Machine

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SLIDE 2

Advanced VLSI Design Subsystem Design CMSC 491C/691C 2 (November 26, 2000 9:39 pm)

UMBC

U M B C U N I V E R S I T Y O F M A R Y L A N D B A L T I M O R E C O U N T Y 1 9 6 6

Control State transition diagrams used to represent state machines. Toll-booth controller example: Write the state equations of the form: if (state == oldstate & condition) next-state = newstate. Rules for assigning state bits and output encoding method given in Weste and Eshraghian. 00 A A Idle 10 A 01 Reset Wait-for-coin C C Wait-for-car-to-exit A Reset Inputs: A (car in booth signal) C (Change OK) Outputs: Turn green-light on

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SLIDE 3

Advanced VLSI Design Subsystem Design CMSC 491C/691C 3 (November 26, 2000 9:39 pm)

UMBC

U M B C U N I V E R S I T Y O F M A R Y L A N D B A L T I M O R E C O U N T Y 1 9 6 6

Control Control logic in CMOS is constructed in two main ways:

  • Two-level sum-of-products
  • Multilevel logic

Two-level sum-of-products: PLA implementation: Regular structure for implementing combinational and sequential logic functions. We have examined how to construct combinational functions already. Sequential functions (finite-state machines) implementations are identical except that outputs are fed back to the inputs via registers. Pseudo n-MOS implementation main disadvantage is static power dissi- pation. Dynamic CMOS implementation involves suppling the AND plane and OR plane with clocks (see Weste and Eshraghian).

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SLIDE 4

Advanced VLSI Design Subsystem Design CMSC 491C/691C 4 (November 26, 2000 9:39 pm)

UMBC

U M B C U N I V E R S I T Y O F M A R Y L A N D B A L T I M O R E C O U N T Y 1 9 6 6

Control Multilevel Logic: Most commonly used method for implementing control logic in CMOS. Cascaded groups of regular gates such as INVERTERS, BUFFERS, NANDs, NORs, XORs and AOIs. CAD systems are highly effective at automatically minimizing the logic, making state assignments and synthesizing layouts as gate-arrays or stan- dard-cell layouts.