Today Power and Energy Review Power management Energy is power - PDF document

Today Power and Energy Review � Power management � Energy is power integrated over time � Hardware capabilities � 1 Watt == 1 Joule / second � Software management strategies � Heat depends on power consumption � Battery life depends on energy consumption � Both power and energy consumption must be bounded The Power Problem Batteries � Processors are getting faster but using more power � Usable energy density increasing by ~10% / year � Performance / Watt remains low � Battery capacities increase slowly � Dominant rechargeable battery technology where � Solutions: energy density is important: Lithium-ion � Use a better VLSI process � 110-160 Wh/KG � Have the system do less work � About 1/3 the energy density of dynamite! � Spread work across several smaller, slower processors � Push the problem to the user � In contrast… • New cell phones often have worse lifetime than the � Gasoline: 14,000 Wh/Kg previous generation � Hydrogen: 38,000 Wh/Kg • Most users choose features over lifetime! � Use power management techniques CMOS Power Consumption Power Saving Features � Affected by: � Voltage � Voltage � Reduce power supply voltage • Power consumption proportional to V 2 � Toggling � Toggling � Reduce activity • More activity == more power � Use simpler hardware � Leakage � These necessitate clock speed reductions • Idle components draw power � Leakage � Disconnect inactive parts from power supply 1

Clock Gating Supply Shutdown � Applicable to processors, memories, etc � Disconnect parts from power supply when not in use � Not analog components � Pros: � Disconnect parts from clock when not in use � General � Stops signal propagation � Saves the most power � Pros: � Con: � Simple � Long transition time � Fast – Stopping only clock distribution, not clock generation � Cons: � Clock still runs, using power � Does not prevent leakage Example: Intel SA-1100 SA-1100 Sleep � StrongARM variant for PDA-type devices � Run → Sleep � Small I- and D-caches � 30 µs – Flush CPU state to RAM � Runs up to 200 MHz � 30 µs – Reset processor state � Three power modes � 30 µs – Shut down clock � Sleep → Run � Run – normal operation � Idle – stops processor clock, I/O logic still powered � 10 ms – Ramp up power supply � Sleep – most chip activity shut down � 150 ms – Stabilize clock � Small – Boot CPU SA 1100 Transition Costs MCF5223x Power P = 400 mW � Most peripherals can be independently powered down Run � CPU modes: run, wait, doze, stop � STOP instruction puts a running processor into one of the 10 us 160 ms three power-saving modes 10 us 90 us • Which one depends on contents of LPCR � Interrupt can bring the CPU out of wait, doze, and stop � No recovery time to bring CPU, SRAM, and flash out of any Idle Sleep power saving mode 90 us • PLL continues to run in all three modes P = 50 mW P = 0.16 mW � Power consumption during transition = P run 2

More MCF5223x Dynamic Voltage Scaling � Run mode – 75-290 mA @ 25 MHz � Power is proportional to V 2 � Wait mode – 16 mA � Reduce power supply voltage → Save energy � CPU and memory clocks are stopped � Peripherals continue to operate normally � Lower voltage necessitates reduced clock frequency � Doze mode – 16 mA � So we can trade off performance and lifetime on a set of batteries � Some peripherals are stopped, others keep running � Stop mode – 0.2-10 mA � Why dynamic? � All clocks stopped – peripherals do not operate � Only external interrupts can wake the processor � Observation: Often, peak CPU requirement >> average CPU requirement � So: Run fast when we have to, run slow otherwise More DVS DVS Examples � Changing voltage takes time � SA-1100 takes two voltages � To stabilize power supply and clock � 3.3 V and 1.5 V � Both continuous and discrete DVS exist � AMD K6-2 � 8 frequencies 200-600 MHz � 1.4 V and 2.0 V � 0.4 ms for voltage change DVS Capability Summary Power Management Policies � In the general case we have: � Static power management – Does not depend on system activity � Some set of voltage choices � Some set of frequency choices � E.g., user-initiated suspend, hibernate, etc. • For each frequency where is a minimum voltage that works � Dynamic power management – Automatically take � Some set of power saving modes actions based on system activity � Some set of transition costs � E.g. shut down functional units, change CPU frequency • Between frequencies • Between voltages • Between running and power saving modes � These are all low-level mechanisms – A high-level policy is needed 3

Dynamic Power Management Problem Formulations � Goal � Need to figure out what the goal is � Appropriately trade off between performance and power � For example: consumption � Minimize power under performance constraints • E.g. must not skip frames while playing MP3 or DVD � Basic premises � Maximize performance under power constraints • E.g. battery must last for the entire plane flight � Systems have non-uniform workloads � It is possible to predict fluctuation in workload with some degree of accuracy • E.g., “the CPU was very busy for the past 1 ms, so it will probably remain busy for the next 1ms” Baseline Policy: Greedy Break-Even Time T BE � Immediately sleep or idle the processor when there’s � Minimum idle time needed to make up for the cost of no work to do entering a sleep mode � Works well when transition times are short compared to idle � Only beneficial to sleep the CPU if the idle time is longer periods than this � Works poorly when transition times are relatively long • I.e., Run/Sleep transitions for the SA-1100 � Assume for now that… � Need to do better than this… � No performance penalty is tolerated � We know in advance the duration of idle periods Break-Even Time How to Save Energy � P TR : Power consumption during transition � Given an idle period T idle > T BE � P On : Power consumption when active � Saved energy = (T idle - T TR )(P On - P OFF ) + T TR (P On – P TR ) � Assume P TR ≤ P On � Total energy that can be saved depends on distribution and size of idle times � T BE of an inactive state is the total time for entering and leaving the state � T BE = T TR = T On,Off + T Off,On � Example: � T BE = 160 ms + 90 μ s for SLEEP in SA-1100 4

Power Saved Practical Power Saving � On real-world traces � In real life we don’t know the duration of idle times in advance � Solutions: � Use a fixed timeout – go to sleep after some amount of time � Predict idle times based on past history � Also very important: � Disk, display, network interface, memory all use power � Need to manage these as well • E.g. shut down half the cache for apps with small working sets Power and Energy Summary � Reducing energy usage while providing advanced � Computing needs are increasing rapidly features is a big problem for portable embedded � Battery capacities are increasing slowly systems � Clever power management schemes can help � Lots of implementation choices � But too much cleverness is bad � Leads to difficult system design problems � Long-term solutions � Clever power management schemes are often � Get help from the user annoying � HW accelerators for demanding application kernels � Better power supplies 5