Threshold Implementations (Efficient TI on AES) Begl Bilgin, - - PowerPoint PPT Presentation

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Threshold Implementations (Efficient TI on AES) Begl Bilgin, - - PowerPoint PPT Presentation

Threshold Implementations (Efficient TI on AES) Begl Bilgin, Benedikt Gierlichs, Svetla Nikova, Ventzislav Nikov, and Vincent Rijmen Introduction Physical Attacks Active Passive (Fault Attacks) (Observing Attacks) Side Channel Attacks


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SLIDE 1

Threshold Implementations

(Efficient TI on AES)

Begül Bilgin, Benedikt Gierlichs, Svetla Nikova, Ventzislav Nikov, and Vincent Rijmen

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SLIDE 2

Active (Fault Attacks) Passive (Observing Attacks) Non-Invasive

Glitching, Temperature Change, Low Voltage, ...

Semi-Invasive

Light Attacks, Radiation Attacks, ... Optical Inspection, ...

Invasive

Laser cutters, Permanent circuit changes, ... Probing, ...

Introduction

Physical Attacks

Side Channel Attacks (Timing Analysis, Power Analysis, EM Attacks) Side Channel Attacks (Timing Analysis, Power Analysis, EM Attacks)

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SLIDE 3
  • Simple Power Analysis (SPA)
  • Differential Power Analysis (DPA)
  • Difference Of Means (DoM)
  • Correlation Power Analysis (CPA)
  • Templates

Introduction

Power Analysis

Exploit information from the correlation between the instantaneous power consumption of the device and the intermediate results of the cryptographic algorithm.

  • Differential Power Analysis (DPA)

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SLIDE 4
  • Circuit level
  • WDDL cells
  • Algorithmic level
  • Introducing Noise (not provably secure)

random delays dummy operations

  • Masking (provably secure)
  • Leakage resilient crypto (limits encryptions per key)

Introduction

DPA Countermeasures

  • Masking (provably secure)

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SLIDE 5

Introduction

Masking

F

inp

  • ut

F

mask

  • ut1

F

inp⊕mask

  • ut2

  • ut

L L

L(inp) = L(mask⊕inp⊕mask) = L(mask) ⊕ L(inp⊕mask)

S S

S(inp) = S(mask⊕inp⊕mask)≠ S(mask) ⊕ S(inp⊕mask) shares

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SLIDE 6

Introduction

Masking

S(inp) = S(mask⊕inp⊕mask) = S(mask) ⊕ S’(mask, inp⊕mask)

S

mask

  • ut1

S’

inp⊕mask

  • ut2
  • ut

S(x,y,z) = x ⊕ yz = (x1⊕x2) ⊕ (y1⊕y2) (z1⊕z2) S(x1,y1,z1) = x1 ⊕ y1z1 S’(x1,x2,y1,y2,z1,z2) = x2 ⊕ y1z2 ⊕ y2z1 ⊕ y2z2

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SLIDE 7

Introduction

Masking

S’

mask

  • ut1

S’

inp⊕mask

  • ut2
  • ut

S(x,y,z) = x ⊕ yz = (x1⊕x2) ⊕ (y1⊕y2) (z1⊕z2) S’(x1,x2,y1,y2,z1,z2) = x1 ⊕ y1z1 ⊕ y1z2 S’(x2,x1,y2,y1,z2,z1) = x2 ⊕ y2z2 ⊕ y2z1

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SLIDE 8

Introduction

Masking

S

mask

  • ut1

S’

inp⊕mask

  • ut2

First-order masking

  • ut

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SLIDE 9

Introduction

Masking

S

mask1

  • ut1

S’

mask2

  • ut2

  • ut

Second-order masking

S’’

inp⊕mask1⊕mask2

  • ut3

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SLIDE 10

✓ Proper randomness ✓ Functions leak independently ✓ Functions should not leak intermediate information depending on both inputs x Not secure in CMOS because of glitches

Introduction

Masking

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SLIDE 11

Introduction

Glitches

S(y,z) = yz = (y1⊕y2) (z1⊕z2) S(y1,z1) = y1z1 S’(y1,y2,z1,z2) = y1z2 ⊕ y2z1 ⊕ y2z2

Assume y2 arrives late

y2 z1 z2 # AND # XOR # TOTAL 0 → 1 1 → 0 0 → 1 1 1 2 1 3 1 → 0 1 1 2 1 3 0 → 1 1 1 1 2 1 → 0 1 1 1 2 0 → 1 1 1 1 2 1 → 0 1 1 1 2

y1z2 y2z1 y2z2

S(y,z) = yz = (y1⊕y2) (z1⊕z2) S(y1,z1) = y1z1 S’(y1,y2,z1,z2) = y1z2 ⊕ y2z1 ⊕ y2z2

y1z2 y2z1 y2z2

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SLIDE 12

Masking Scheme based on Secret Sharing and Multiparty Computation Pros:

✓ Security in a circuit with

glitches

✓ Efficient in HW ✓ Any HW technology

Cons:

x High order non-linear

function are challenging AES (8k), Present (3k), Noekeon, Keccak (30k)

roughly 3 times larger than unshared

Threshold Implementations

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SLIDE 13

Threshold Implementations

S

(x, y, z, ...) (a, b, c , ...)

S1

(x1,y1,z1, ...) (a1,b1,c1, ...)

S2

(x2,y2,z2, ...) (a2,b2,c2, ...)

Ss

(xs,ys,zs, ...) (as,bs,cs, ...) … … …

3 properties

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SLIDE 14

Threshold Implementations

S1

(x1,y1,z1, ...) (a1,b1,c1, ...)

S2

(x2,y2,z2, ...) (a2,b2,c2, ...)

Ss

(xs,ys,zs, ...) (as,bs,cs, ...) … … …

Correctness, Non-completeness, Uniformity

⊕ ⊕ ⊕ ⊕ ⊕ ⊕ = = (x, y, z, ...) (a, b, c, ...)

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SLIDE 15

Threshold Implementations

S1

(x1,y1,z1, ...) (a1,b1,c1, ...)

S2

(x2,y2,z2, ...) (a2,b2,c2, ...)

Ss

(xs,ys,zs, ...) (as,bs,cs, ...) … … … ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ = = (x, y, z, ...) (a, b, c, ...)

Correctness, Non-completeness, Uniformity

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SLIDE 16

Threshold Implementations

S(x,y,z) = x ⊕ yz = (x1⊕x2⊕x3) ⊕ (y1⊕y2⊕y3) (z1⊕z2⊕z3) S1(x2,x3,y2,y3,z2,z3) = x2 ⊕ y2z2 ⊕ y2z3 ⊕ y3z2 S2(x1,x3,y1,y3,z1,z3) = x3 ⊕ y3z3 ⊕ y3z1 ⊕ y1z3 S3(x1,x2,y1,y2,z1,z2) = x1 ⊕ y1z1 ⊕ y1z2 ⊕ y2z1

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SLIDE 17

Threshold Implementations

If the input masking is uniform and the circuit is non-complete, then the stochastic functions Si and x are independent for any i. If the input masking is uniform and the circuit is non-complete, then any single component function Si does not leak information on x.

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Need at least d+1 shares for a function of degree d

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SLIDE 18

Threshold Implementations

S1

(x1,y1,z1, ...) (a1,b1,c1, ...)

S2

(x2,y2,z2, ...) (a2,b2,c2, ...)

Ss

(xs,ys,zs, ...) (as,bs,cs, ...) … … … ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ = = (x, y, z, ...) (a, b, c, ...)

Correctness, Non-completeness, Uniformity

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SLIDE 19

Threshold Implementations

Uniformity A masking X is uniform ⟺ ∃ a constant p s.t. ∀ x we have: if X∈ Sh(x) then Pr(X|x) = p, else Pr(X|x)=0. If the unshared function is a permutation, the shared function should also be a permutation. If uniformity can not be achieved during Si calculation, apply re-masking.

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SLIDE 20

F1

(x1,y1,z1, ...) (a1,b1,c1, ...)

F2

(x2,y2,z2, ...) (a2,b2,c2, ...)

Fs

(xs,ys,zs, ...) (as,bs,cs, ...) … … … ⊕ ⊕ ⊕ ⊕ ⊕ ⊕ = = (x, y, z, ...) (a, b, c, ...)

R1 R2 Rs G1 G2

Gs

S = G o F Separate non-linear functions with registers

Threshold Implementations

Decomposition

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SLIDE 21
  • All 3x3 and 4x4 S-boxes
  • PRESENT: uses 4x4 S-box with degree 3
  • 3,3 kGE (1,1 kGE unprotected)
  • KECCAK: uses 5x5 S-box with degree 2
  • 32,6 kGE (10,6 kGE unprotected)
  • AES: uses 8x8 S-box with degree 7
  • by Moradi et al. and by us
  • Authenticated Encryption designs FIDES and PRIMATEs

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  • All 3x3 and 4x4 S-boxes

Applications

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SLIDE 22

Threshold Implementations

4x4 S-boxes

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remark unshared 3 shar shares 4 s 4 shares res 5 shares remark 1 2 3 4 1 2 3 1 affine 1 1 1 1 quadratic 6 5 1 6 6 cubic in A16 30 28 2 30 30 cubic in A16 114 113 1 114 114 cubic in S16 \ A16 151 4 22 125 151

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SLIDE 23

Threshold Implementations

4x4 S-boxes

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Many S-boxes with good cryptographic properties

remark unshared 3 shar shares 4 s 4 shares res 5 shares remark 1 2 3 4 1 2 3 1 affine 1 1 1 1 quadratic 6 5 1 6 6 cubic in A16 30 28 2 30 30 cubic in A16 114 113 1 114 114 cubic in S16 \ A16 151 4 22 125 151

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SLIDE 24

Threshold Implementations

4x4 S-boxes

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Many S-boxes with good cryptographic properties

remark unshared 3 shar shares 4 s 4 shares res 5 shares remark 1 2 3 4 1 2 3 1 affine 1 1 1 1 quadratic 6 5 1 6 6 cubic in A16 30 28 2 30 30 cubic in A16 114 113 1 114 114 cubic in S16 \ A16 151 4 22 125 151

GF(2^4) inversion

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SLIDE 25
  • All 3x3 and 4x4 S-boxes
  • PRESENT: uses 4x4 S-box with degree 3
  • 3,3 kGE (1,1 kGE unprotected)
  • KECCAK: uses 5x5 S-box with degree 2
  • 32,6 kGE (10,6 kGE unprotected)
  • AES: uses 8x8 S-box with degree 7
  • by Moradi et al. and by us
  • Authenticated Encryption designs FIDES and PRIMATEs

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Applications

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SLIDE 26
  • A. Moradi, A. Poschmann, S. Ling, C. Paar, and H. Wang: Pushing the Limits: A

Very Compact and a Threshold Implementation of AES. EUROCRYPT 2011

  • All operations on 3 shares
  • 5 pipeline stages in S-box
  • Tower field GF(22)
  • Requires extra randomness (48 bits per S-box)

TI on AES

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SLIDE 27
  • B. Bilgin, B. Gierlichs, S. Nikova,
  • V. Nikov, and
  • V. Rijmen: A More Efficient AES Threshold
  • Implementation. AFRICACRYPT 2014
  • IDEA: Adjust the number of shares as needed
  • RESULT: Smaller area, less clock cycles, less extra randomness
  • Data flow as in Moradi et al.
  • Linear part: only 2 shares
  • S-box: 2 to 5 shares
  • Tower field GF(24)

TI on AES

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SLIDE 28

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

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SLIDE 29

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

5 shares

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SLIDE 30

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

5 shares, 4 input 3 output shares

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SLIDE 31

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

5 shares, 4 input 3 output shares, 2 shares

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SLIDE 32

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

5 shares, 4 input 3 output shares, 2 shares, 4 shares

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SLIDE 33

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

5 shares, 4 input 3 output shares, 2 shares, 4 shares, 3 shares

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SLIDE 34

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

registers after every nonlinear function 5 shares, 4 input 3 output shares, 2 shares, 4 shares, 3 shares

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SLIDE 35

lin. map GF(24) square scaler GF(24) multiplier

GF(24) inverter GF(24) multiplier GF(24) multiplier

inv. lin. map

TI on AES

S-box

registers after every nonlinear function 5 shares, 4 input 3 output shares, 2 shares, 4 shares, 3 shares re-masking to change the number of shares

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SLIDE 36

TI on AES

Implementation Results

State Array Key Array S-box Mix Col. Cont. MUXes Other Total cycles rand bits ** Amir et al. 2529 2526 4244 1120 166 376 153 11114/11031 266 48 This paper 1698 1890 3708 770 221 746 69 9102 246 44 This paper* 1698 1890 3003 544 221 746 69 8171 246 44 * compi compile_ultra tra ** ** per S-box S-box

  • Based on plain Canright S-box (233 GE)
  • Based on plain Amir’s AES (2.4 GE)
  • Keeping Hierarchy

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SLIDE 37
  • Goals:
  • 1. Verify resistance against first order attacks
  • 2. Evaluate resistance against HO attacks
  • Univariate attacks → shares are processed in parallel
  • Adversary friendly conditions
  • 1. PRNG not active during TI-AES → less noise
  • 2. Well alignment
  • 3. Adversary knows the implementation (masks unknown)

TI on AES

Practical Security Evaluation

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SLIDE 38
  • PRNG off, first order CPA, HD model at S-box output
  • Highest peak 3 cycles later, input MC

TI on AES

Practical Security Evaluation

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SLIDE 39
  • PRNG off, first order correlation collision attack

TI on AES

Practical Security Evaluation

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SLIDE 40
  • PRNG on, first order CPA / correlation collision attack
  • 10 million traces

TI on AES

Practical Security Evaluation

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SLIDE 41
  • PRNG on, second order CPA
  • HD model at S-box output

TI on AES

Practical Security Evaluation

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SLIDE 42
  • PRNG on, second order correlation collision attack

TI on AES

Practical Security Evaluation

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SLIDE 43
  • Goal 1: verify resistance against first order attacks
  • Evaluation limited by number of traces
  • 10 million traces
  • Goal 2: evaluate resistance against HO attacks
  • Most trace-efficient second order attack requires 600k tr
  • Second Order attacks: Number of traces scales quadratically

in the noise standard deviation (we had little noise)

TI on AES

Practical Security Evaluation

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SLIDE 44
  • TI is provably secure against first order DPA
  • TI can be efficient
  • Room for improvement:
  • Solutions to uniformity problems
  • Security against higher order DPA
  • Consider countermeasures during design process

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Conclusion

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SLIDE 45

45

Thank You!