The HeartBeat model A platform abstraction enabling fast prototyping - - PowerPoint PPT Presentation

The HeartBeat model

A platform abstraction enabling fast prototyping

• f real-time applications on NoC-based MPSoC on FPGA

Francesco Robino, Johnny ¨ Oberg

KTH Royal Institute of Technology

ReCoSoC 2013

• F. Robino (KTH)

The HeartBeat model 11-07-2013 1 / 16

Overview of the talk

Motivation

What is the problem? Benefits solving the problem

Our solution

Modeling techniques Our idea From idea to implementation Experimental evidences and examples

Conclusion

• F. Robino (KTH)

The HeartBeat model 11-07-2013 2 / 16

Motivation: Embedded systems modeling

Embedded systems are getting very complex We want to abstract, reduce details in the system model We want System Design Automation to automatically add details

it implements the embedded application on multi-processor platforms the automated synthesis of the whole system must be fast!

• F. Robino (KTH)

The HeartBeat model 11-07-2013 3 / 16

Motivation: Embedded system architecture

Embedded architectures are getting very complex details are increasing! sea-of-cores / processors NoC-based MPSoC

Pe0 Pe2 Pe3 Pe6 Pe5 Pe8 Pe9 Pe11 Pe1 Pe4 Pe7 Pe10

• F. Robino (KTH)

The HeartBeat model 11-07-2013 4 / 16

The problem

P e P e P e P e P e P e

Huge abstraction gap Huge design space

Platform allocation Processes binding Processes schedule

Platform:

complex to program complex to generate

Filling the gap through design automation: benefits

Reduces time to market, reduces errors, reduces complexity...

• F. Robino (KTH)

The HeartBeat model 11-07-2013 5 / 16

Modeling techniques

The theory of models of computation (MoCs)

A MoC defines communication and execution rules between nodes executing the operations. The MoC rules can be described through formal notation (math) Embedded application modeled as a set of communicating processes

• F. Robino (KTH)

The HeartBeat model 11-07-2013 6 / 16

The synchronous MoC

We use the synchronous MoC Used in synchronous languages (i.e. Lustre) to guarantee real-time Combinatorial application in the synchronous MoC:

+1

p Tag Event Value

1 2 3 4 7 6 9 1 2 3 3 6 5 8

Application with memory in the synchronous MoC:

+1

p dly

1 2 3 4 7 6

Tag

1 2 3 3 6 5 8

• F. Robino (KTH)

The HeartBeat model 11-07-2013 7 / 16

From synchronous MoC to NoC-based MPSoC

+1

p dly

1 2 3 4 7 6

Tag

1 2 3 3 6 5 8 Pe0 Pe1

+1

p dly

+1

p dly

Time

1 2 3 m s 3 6 5 8 1 2 3 m s 4 7 6

• F. Robino (KTH)

The HeartBeat model 11-07-2013 8 / 16

From synchronous MoC to NoC-based MPSoC

We define an intermediate layer, the HeartBeat model:

fills the abstraction gap adding details about timing and architecture enables the MPSoC to expose the same semantics of the MoC critical path (RTL, sea of gates) ⇋ HB period (MoC, sea of cores)

+ 1

p d l y P e

1 2 3 m s 3 6 5 8

+ 1

p

N

• C

4 7 9 1 2 3 m s

ε c P e 1 H B p e r i

• d

H B t i c k s

. . .

The HeartBeat model (for this simple example)

tHB ≥

M

max

m=0(tǫi + tci)

• F. Robino (KTH)

The HeartBeat model 11-07-2013 9 / 16

A HW/SW co-design flow based on the HeartBeat model

Process(es) functionality C file(s) XML platform configuration and process(es) mapping

HeartBeat NoC system Generator

Target FPGA

Back-end flow F r

• n

t

• e

n d f l

• w

Graphical User Interface Application view Platform view Allocation Binding Scheduling

Software synthesis of C wrappers for MoC support

• F. Robino (KTH)

The HeartBeat model 11-07-2013 10 / 16

SW synthesis technique

Application view: synthesis of software to access NoC API and synchronize on HB tick

Initialize processes Execute PE processes HB tick received? Begin Y N

p0_main p1_main ... pn_main Begin Message received? Execute user specified functionality Previous process communication concluded? Send result to next process End

Y N Y N

Pe0

• F. Robino (KTH)

The HeartBeat model 11-07-2013 11 / 16

HW synthesis technique

Platform view: synthesis of NoC-based MPSoC with HeartBeat support

A HW timer generates HB ticks The HB period (timer period) can be defined by the user, following the Heartbeat model P e P e 4 P e 1 P e 5 P e 2 P e 6 P e 3 P e 7

HeartBeat

Synthesized software

• F. Robino (KTH)

The HeartBeat model 11-07-2013 12 / 16

Case study

A neural network, 4 layers, each layer 100 neurons Each layer on a separate PE (4 layers, 4 PEs, 2 × 2 NoC) Generation of files for prototype synthesis on FPGA < 1 second

n0 n1 n99

w0 w1

P0 P1

f

s u m

P2 P3

Pe0 Pe0 Pe0 Pe0 HeartBeat SDA flow

• F. Robino (KTH)

The HeartBeat model 11-07-2013 13 / 16

Case study

Optimize the application: find the minimal HB period of the system

The HeartBeat model (for this simple example)

tHB ≥

M

max

m=0(tǫi + tci)

tǫi has been found through extensive emulations. Its value is 5,97 ms tci can be found following models proposed in referenced papers The HeartBeat period is totally dominated by tǫi, it is an order of magnitude larger than tci Concluding the maximal HB frequency of the system is

1 5,97 ≃ 150 Hz

• F. Robino (KTH)

The HeartBeat model 11-07-2013 14 / 16

Results and related work

Design flow MAMPS Our work Target platform 2 processors 4 processors Platform interconnection 2 × 1 NoC 2 × 2 NoC Creating system model manual(SDF) manual(SY) Creating application model manual semiautomatic Generating architecture model 1 second ∼100 millisec Mapping the design 1 minute manual Generate Xilinx/Altera project 16 seconds ∼500 millisec

Table: SDA flows steps rapidity

COMPSOC Open-Scale MAMPS Our work MoC entry HSDF KPN SDF Sync NoC arch. Mesh Mesh Mesh Mesh NoC dim. 2D 2D 2D 2D,3D API generation Y N N Y Prototype Y Y Y Y OS avail. Y Y N N

Table: SDA flows properties comparison

• F. Robino (KTH)

The HeartBeat model 11-07-2013 15 / 16

Conclusion

The HeartBeat model is an intermediate platform model bridging the abstraction gap between the synchronous MoC and a NoC-based MPSoC platform The HeartBeat model enables a SDA flow to synthesize an embedded application onto a NoC-based MPSoC on FPGA, provided that the timing constraints of the HeartBeat model are met The design flow reduces the complexity of designing embedded systems for NoC-based MPSoCs through a GUI The automated flow speeds up the design process of embedded systems.

More info and tutorials

https://forsyde.ict.kth.se/noc generator/

• F. Robino (KTH)

The HeartBeat model 11-07-2013 16 / 16