The CMS Track Trigger and the Processing of its Data Christian - - PowerPoint PPT Presentation

the cms track trigger and the processing of its data
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The CMS Track Trigger and the Processing of its Data Christian - - PowerPoint PPT Presentation

The CMS Track Trigger and the Processing of its Data Christian Amstutz Institute for Data Processing and Electronics (IPE) 0 22.2.2016 KIT University of the State of Baden-Wuerttemberg and www.kit.edu National Research Center of the


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SLIDE 1

22.2.2016

Institute for Data Processing and Electronics (IPE)

The CMS Track Trigger and the Processing of its Data

Christian Amstutz

KIT – University of the State of Baden-Wuerttemberg and National Research Center of the Helmholtz Association

www.kit.edu

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SLIDE 2

So many Particles!

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22.2.2016

Recorded Event (2012) Simulation for HL-LHC (2025)

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SLIDE 3

So many Particles!

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22.2.2016

Recorded Event (2012) Simulation for HL-LHC (2025) ≈ 10 cm

High-Luminosity LHC: Concurrent Collisions: up to 200 Number Tracks: ≈ 10000

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SLIDE 4

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22.2.2016

The Current CMS Silicon Tracker

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SLIDE 5

Evolution of Channels in Silicon Trackers

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22.2.2016

1980 1990 2000 2010 2020 2030 104 106 108 1010 ATLAS - Phase 2 CMS - Phase 2 ATLAS CMS GLAST AMS-02 DØ Zeus CDF-II DELPHI (96) CDF-I Mark II NA11/NA32 Number of strip channels

Silicon detectors: 1.7 times more channels every two years Moore’s law: 2 times more transistors every two years

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SLIDE 6

The CMS Silicon Tracker for HL-LHC

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22.2.2016

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SLIDE 7

The Trigger System of CMS – today

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22.2.2016

Outer Silicon Tracker Electromagnetic Calorimeter Hadron Calorimeter Muon Chambers

Front-end Pipeline Front-end Pipeline Front-end Pipeline Front-end Pipeline

Level 1 Trigger Read-out Buffer Event Buffer High-Level Trigger Storage

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SLIDE 8

The Trigger System of CMS – at the HL-LHC

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22.2.2016

Outer Silicon Tracker Electromagnetic Calorimeter Hadron Calorimeter Muon Chambers

Front-end Pipeline Front-end Pipeline Front-end Pipeline Front-end Pipeline

Track Trigger Level 1 Trigger Read-out Buffer Event Buffer High-Level Trigger Storage 40 MHz (12.5 us) <1 MHz (160 ms) < 1 kHz

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SLIDE 9

Challenges of the CMS Track Trigger

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22.2.2016

Bunch collision rate: 40 MHz Data rate produced by the detector: 11’200 Tbit/s Data rate transmitted to Track Trigger: 50 Tbit/s Optical Fibers: 15000 Latency (Sensor - L1 Trigger - Sensor): < 12.5 us Goal: Providing High-Energy Tracks to the Level-1 Trigger.

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SLIDE 10

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 11

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 12

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 13

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 14

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 15

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM):

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SLIDE 16

An Approach using Associative Memories (AM)

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22.2.2016

Working principle of Content Addressable Memories (CAM): Very fast lookup whether content is available

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SLIDE 17

Stacked Modules and Stubs

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B

High-momentum Particle Low-momentum Particle

Accepted particles: pT > 3 GeV

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SLIDE 18

Arranging the Tracker Data

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BX=1 BX=2 BX=3 BX=4

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SLIDE 19

Track Finding by Associative Memory

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Patternbank

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SLIDE 20

Track Finding by Associative Memory

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22.2.2016

Patternbank

Compare

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SLIDE 21

Track Finding by Associative Memory

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22.2.2016

Patternbank

Compare

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SLIDE 22

Event Building

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SLIDE 23

Event Building

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SLIDE 24

Event Building

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Track Fitting by Linearized Fit

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A · hit1 + B · hit2 + ... + F · hit6 Pre-calculated Constants A, B, C, D, E, F Track Parameters: Z0 : Origin on Z-axis C : Curvature φ0 : ∡ to XZ-plane θ : ∡ to XY-plane

φ0

1 C

z x y

}

z0 θ

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SLIDE 26

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SLIDE 27

System Simulation I

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Idea: Model an essential part of the CMS Track Trigger electronics Goals: Evaluation of system properties (latencies, link bandwidths, ...) Evaluation of system architectures Generation of test vectors for hardware debugging Realization Realized in SystemC (a C++ library) All existing modules, but not all details Parameters of modules configurable

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SLIDE 28

System Simulation I

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22.2.2016

Idea: Model an essential part of the CMS Track Trigger electronics Goals: Evaluation of system properties (latencies, link bandwidths, ...) Evaluation of system architectures Generation of test vectors for hardware debugging Realization Realized in SystemC (a C++ library) All existing modules, but not all details Parameters of modules configurable One sector of the Track Trigger has been simulated

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SLIDE 29

System Simulation II

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22.2.2016 Input Hits Output Tracks Trigger Tower Processor Organizer AM Processing Board AM Processing Board AM Processing Board AM Processing Board Data Organizer ATCA Blade Processor Organizer AM Processing Board AM Processing Board AM Processing Board AM Processing Board Data Organizer ATCA Blade DTC DTC DTC Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module DTC DTC DTC DTC DTC DTC DTC Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module Sensor Module

Patterns Cabling Scheme

Component Configuration

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FPGA — Programmable Digital Chips

... a very very brief introduction

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22.2.2016

Field-Programmable Gate Array

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SLIDE 31

FPGA — Programmable Digital Chips

... a very very brief introduction

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22.2.2016

Field-Programmable Gate Array

Flip-Flop Lookup Table

clk in1 in2 in3 in4

  • ut

Selector

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SLIDE 32

FPGA — Programmable Digital Chips

... a very very brief introduction

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22.2.2016

Field-Programmable Gate Array

Flip-Flop Lookup Table

clk in1 in2 in3 in4

  • ut

Selector

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SLIDE 33

FPGA — Programmable Digital Chips

... a very very brief introduction

16

22.2.2016

Field-Programmable Gate Array

Flip-Flop Lookup Table

clk in1 in2 in3 in4

  • ut

Selector

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SLIDE 34

FPGA — Programmable Digital Chips

... a very very brief introduction

16

22.2.2016

Field-Programmable Gate Array

Flip-Flop Lookup Table

clk in1 in2 in3 in4

  • ut

Selector

multiply_vectors(a[1000], b[1000]) for i = 1 to 1000 c[i] = a[i] * b[i] return c

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SLIDE 35

Electronic System behind the Data Processing

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22.2.2016

BX=3 BX=4 Sensor Module 15000

10 Gbps

MTCA crate 72

100 Gbps

ATCA crate 48 Pulsar-IIb Board 550 AM Board 2200

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SLIDE 36

The Pattern Recognition Mezzanine

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SLIDE 37

Cost Estimation for the Track Trigger

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1 ATCA crate 8k e Cables and transceivers 24k e 12 ATCA blades: 12 Printed Circuit Boards 36k e 12 FPGAs 64k e 12 AM Chip sets 64k e 196k e

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SLIDE 38

Cost Estimation for the Track Trigger

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1 ATCA crate 8k e Cables and transceivers 24k e 12 ATCA blades: 12 Printed Circuit Boards 36k e 12 FPGAs 64k e 12 AM Chip sets 64k e 196k e Total equipment cost: 48 crates * 196k e = 9.4M e

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SLIDE 39

Conclusion

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One of the most complex electronic systems ever built Contributions of many groups are necessary Very competitive spirit between different groups The Track Trigger is essential for CMS HL-LHC

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SLIDE 40

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22.2.2016

Thank you for your attention

source: www.xkcd.com