Testing of the new VIPIC chip for X-photon counting applications - - PowerPoint PPT Presentation

testing of the new vipic chip for x photon counting
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Testing of the new VIPIC chip for X-photon counting applications - - PowerPoint PPT Presentation

Testing of the new VIPIC chip for X-photon counting applications Intern: Pietro Peronio 1 Supervisor: Grzegorz W. Deptuch 2 1 Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Italy 2 Particle Physics Division ASIC


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Testing of the new VIPIC chip for X-photon counting applications

Intern: Pietro Peronio 1 Supervisor: Grzegorz W. Deptuch 2

1Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Italy 2Particle Physics Division ASIC Development group, Fermilab, Illinois, USA

September 24th, 2014

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 1 / 16

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Summary

1

Introduction

2

Preliminary analyses

3

Autocorrelation analyses

4

Future developments

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 2 / 16

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Introduction

Training program

The intern will be involved in the testing process of a new kind of readout circuit (VIPIC chip) designed in a novel 3D-IC technology by the Fermilab Application Specific Integrated Circuit (ASIC) Development group

Tasks

The intern will learn the structure and the working principle of the new Vertically Integrated Photon Imaging Chip (VIPIC) The intern will develop Matlab code in order to do in depth analyses of the data acquired with the VIPIC chip at the Argonne National Laboratory (ANL) Synchrotron By means of the analyses the intern will infere if the chip is working correctly and so will help the ASIC group in its improvement After the basic analyses the intern will collaborate with ANL researchers in order to perform the X-Ray Photon Correlation Spectroscopy (XPCS) using the acquired data

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 3 / 16

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Introduction

VIPIC basic block scheme

4096 DIODES Counting

5-bit counter 5-bit counter

pixel 1

5-bit counter 5-bit counter

pixel 2

5-bit counter 5-bit counter

pixel 4096 group 1 LVDS serializer group 2 LVDS serializer group 16 LVDS serializer 256 256 256 Readout

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 4 / 16

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Introduction

VIPIC 3D structure

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 5 / 16

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Preliminary analyses

Working principle

1 2 3 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 153 ns 4 5

153 ns Photons sequence APS clock Internal clock

t t t

Electrons and photons are sorted in 24 bunches. In order to correctly sort them it is mandatory to have a correct triggering mechanism

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 6 / 16

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SLIDE 7

Preliminary analyses

Module 24 analysis

Using the APS clock photons are correctly sorted in the bunches

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 7 / 16

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Preliminary analyses

Direct beam operating condition

Beam line Slit Detector

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 8 / 16

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Preliminary analyses

Matrix counts

10 20 30 40 50 60 10 20 30 40 50 60 1 10 102 103 104 105 106

Remark Moving further from the center of the slit the light intensity is decreasing whereas some pixel on both left and right borders seems to slightly increase their counts

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 9 / 16

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Preliminary analyses

Debug of the reset mechanism

Each pixel is connected to a counter Counters are reset after being readout During the analysis it was found that some counters have a value bigger than one. This is not consistent with physics Cause Only counters that have been readout are forced to reset whereas the

  • ther ones keep on counting. This is a problem if the number of hits per

frame is too high. By means of this analysis a new reset mechanism will be designed in other to avoid that problem.

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 10 / 16

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SLIDE 11

Autocorrelation analyses

Autocorrelation software

Matlab code provided by ANL’s researchers g(2)(pi, τ) = < I(pi, t) · I(pi, t + τ) >t < I(pi, t) >2

t

Implemented algorhitm is based on a logarithmic sampling of time delays followed by a time average in order to reduce the dispersion of g(2) function for higher delays due to the lack of samples

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 11 / 16

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Autocorrelation analyses

Autocorrelation – Direct beam

1 102 104 106 5 10 1

g(2)(t) Time delay [μs]

Counts sequence

Autocorrelation of a poissonian sequence g(2)(pi, m) =

  • 1

if m>0 1 + 1

µ

if m=0 where µ is the mean value of the sequence

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 12 / 16

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Autocorrelation analyses

Direct beam

1 2 3 4 5 6 7 1 10 102 103 104 105

Time delay (number of frames) g(2)

mean value 5x10-4 mean value 0.001 mean value 0.1

Poissonian sequence

5 10 15 20 25 30 1 10 102 103 104 105 106

g(2)

106 samples 107 samples 108 samples

Counts sequence

mean value 5x10-4 35 40 107 108 106 8 9 1 106 samples

Time delay (number of frames)

Conclusions The bouncing at short time delays seems to be due to the finite length of the counts sequence

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 13 / 16

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SLIDE 14

Autocorrelation analyses

Colloid data

Data collected illuminating a colloid sample and collecting photons coming from it. During the analysis it was found that some data have a wrong header

1 10 102 103 104 105 (a) (b) 10 20 30 40 50 60 10 20 30 40 50 60 1 10 102 103 104 105 10 20 30 40 50 60 10 20 30 40 50 60

Conclusions The problem is related only to a specific readout group. Only the header seems to be corrupted

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 14 / 16

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Autocorrelation analyses

g(2) – Central anular ring

g(2) was calculated and averaged on an area with quite uniform

  • illumination. The shape is still poissonian increasing the number of frames.

Delay (μs) g(2)

(a) (b) 0.92 0.94 0.96 0.98 1 1.02 1 10 102 103 104 105 106 0.93 0.95 0.97 0.99 1.01 10 20 30 40 50 60 10 20 30 40 50 60 10 102 103 104 105 106 107 108

Conclusions g(2) needs to be averaged on a smaller area in order not to change statistics

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 15 / 16

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Future developments

Next steps

The autocorrelation analyses will be done on all the files acquired at ANL These analyses will help the designers team to debug errors A new VIPIC chip meant to be connected to a 1 million pixels matrix will be designed

Pietro Peronio (Politecnico di Milano) Testing of the new VIPIC chip September 24th, 2014 16 / 16