System-on-Chip Design HW/SW Interfaces and Communica;ons Hao Zheng - - PowerPoint PPT Presentation

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System-on-Chip Design HW/SW Interfaces and Communica;ons Hao Zheng - - PowerPoint PPT Presentation

Oct 24, 2023 15 likes •235 views

System-on-Chip Design HW/SW Interfaces and Communica;ons Hao Zheng Comp Sci & Eng U of South Florida 1 System Structural Model Mem CPU P1 P2 Arbiter Bridge P3 P5 P4 HW HW 2 Basic Elements of HW/SW Interfaces 1. On-chip

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SLIDE 1

System-on-Chip Design

HW/SW Interfaces and Communica;ons

Hao Zheng Comp Sci & Eng U of South Florida

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SLIDE 2

System Structural Model

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Bridge HW P5 HW P3 P4 P1 P2 CPU Mem Arbiter

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SLIDE 3

Basic Elements of HW/SW Interfaces

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  • 1. On-chip communicaCon fabrics, ex. buses
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SLIDE 4

Basic Elements of HW/SW Interfaces

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  • 2. CPU interface for SW to communicate with custom HW.
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SLIDE 5

Basic Elements of HW/SW Interfaces

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  • 3. HW interface for custom HW to communicate with CPU.
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SLIDE 6

Basic Elements of HW/SW Interfaces

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  • 4. SW driver converts SW IO operaCons to operaCons

supported by CPU interface.

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SLIDE 7

Basic Elements of HW/SW Interfaces

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  • 5. Programming model where SW running CPU uses to

control custom HW module.

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SLIDE 8

Synchroniza;on Schemes

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SynchronizaCon is necessary for effecCve communicaCons, i.e. data transferred between CPU and HW correctly. SynchronizaCon is part of interface implementaCon.

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SLIDE 9

Synchroniza;on Schemes

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Time: how synchronizaCon is defined over Cme.

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SLIDE 10

Synchroniza;on Schemes

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Data: how data is represented in synchronizaCon.

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SLIDE 11

Synchroniza;on Schemes

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Control: how synchronizaCon is implemented locally in individual modules..

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SLIDE 12

Semaphores

  • Used to control of accesses to shared

resource.

  • Two ops on semaphore S:

– P(S): acquire S. – V(S): release S.

  • How can we ensure an
  • rder between thread

1 & 2?

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thread 1: … P(S); x++; V(s); … thread 2: … P(S); x = x – 2; V(s); …

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SLIDE 13

Semaphores

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int shared_data; semaphore S; enCty one { P(S); while (1) { short_delay(); shared_data = …; V(S); }} enCty two { short_delay(); while (1) { P(S); rd = shared_data; }}

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SLIDE 14

Semaphores

  • Semaphores can only guarantee exclusive

access to shared resources.

– Difficult to control precise data transfer – MulCple semaphores can be used, but not elegant.

  • Handshaking: a signaling protocol between

two enCCes to coordinate data transfers.

– Can handle enCCes with different speeds.

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SLIDE 15

One-Way Handshake

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Assume that enCty two is slower.

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Two-Way Handshake

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SLIDE 17

X

Two-Way Handshake for Data Transfer

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req ack data

X X X X X

d1 clk req ack data Src Dest

X X X

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SLIDE 18

Communica;on Constrained vs Computa;on Constrained

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System performance should consider both computaCon performance and communicaCon overhead.

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SLIDE 19

Communica;on Constrained vs Computa;on Constrained

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Tight and Loose Coupling

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Coupling: the level of interacCons between two components. Degree of coupling affects choice and implementaCon

  • f

synchronizaCon.

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Dedicated vs Shared Interfaces

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Coprocessor Memory-mapped Factor interface interface Addressing Processor-specific On-chip bus address Connection Point-to-point Shared Latency Fixed Variable Throughput Higher Lower

Cght coupling loose coupling Nature of coupling affects the organizaCon of HW/SW interfaces

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SLIDE 22

Reading Guide

  • Chapter 9, the CoDesign book.

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