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Syndrome-Coupled Rate-Compatible Error-Correcting Codes for Flash - - PowerPoint PPT Presentation

Syndrome-Coupled Rate-Compatible Error-Correcting Codes for Flash Memories Pengfei Huang 1 , Yi Liu 1 , Xiaojie Zhang 2 , Paul H. Siegel 1 , Erich F. Haratsch 3 1 Center for Memory and Recording Research, UCSD 2 CNEX Labs, San Jose, CA 3 Seagate


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SLIDE 1

Syndrome-Coupled Rate-Compatible Error-Correcting Codes for Flash Memories

Pengfei Huang1, Yi Liu1, Xiaojie Zhang2, Paul H. Siegel1, Erich F. Haratsch3

1 Center for Memory and Recording Research, UCSD 2 CNEX Labs, San Jose, CA 3 Seagate Technology, CA

NVMW, Mar. 12, 2018

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SLIDE 2

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 3

Motivation

Flash memory channels degrade with use.

2000 4000 6000 8000 10000 Program/Erase (P/E) Cycle Count 10-6 10-5 10-4 10-3 10-2 Bit Error Rate (BER) Average RBER Lower Page RBER Upper Page RBER

Stronger error correction capability is needed as wear increases. We propose a general code construction to address this need: syndrome-coupled rate-compatible error-correcting codes

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SLIDE 4

Introduction to Rate-Compatible Codes

Rate-compatible codes: a family of extended codes {Ci}i=1,...,M. Code Ci+1 obtained from code Ci by adding redundancy symbols. Decreasing rate, but increasing error-correcting capability. Example: a family of 3-level rate-compatible codes.

Codes: C1 ≺ C2 ≺ C3. Rates: R1 > R2 > R3.

c1 c2 c3 r2 r3

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SLIDE 5

Introduction to Rate-Compatible Codes

Rate-compatible codes: a family of extended codes {Ci}i=1,...,M. Code Ci+1 obtained from code Ci by adding redundancy symbols. Decreasing rate, but increasing error-correcting capability. Example: a family of 3-level rate-compatible codes.

Codes: C1 ≺ C2 ≺ C3. Rates: R1 > R2 > R3.

c1 c2 c3 r2 r3

Challenge: How to systematically add these redundancy symbols.

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SLIDE 6

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 7

Syndrome-Coupled Code Construction

Example: a family of 3-level rate-compatible codes C1 ≺ C2 ≺ C3.

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SLIDE 8

Syndrome-Coupled Code Construction

Example: a family of 3-level rate-compatible codes C1 ≺ C2 ≺ C3. 1) Choose nested codes C3

1 ⊂ C2 1 ⊂ C1 1 = C1 = [n1, n1 − v1, d1]q.

Ci

1 = [n1, n1 − i m=1 vm, di]q for 1 ≤ i ≤ 3, d1 ≤ d2 ≤ d3.

Parity-check matrices of C1

1, C2 1, and C3 1.

HC1

1

HC2

1 =

  • HC1

1

HC2

1|C1 1

  • HC3

1 =

   HC1

1

HC2

1|C1 1

HC3

1|C2 1

  

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SLIDE 9

Syndrome-Coupled Code Construction

Example: a family of 3-level rate-compatible codes C1 ≺ C2 ≺ C3. 1) Choose nested codes C3

1 ⊂ C2 1 ⊂ C1 1 = C1 = [n1, n1 − v1, d1]q.

Ci

1 = [n1, n1 − i m=1 vm, di]q for 1 ≤ i ≤ 3, d1 ≤ d2 ≤ d3.

Parity-check matrices of C1

1, C2 1, and C3 1.

HC1

1

HC2

1 =

  • HC1

1

HC2

1|C1 1

  • HC3

1 =

   HC1

1

HC2

1|C1 1

HC3

1|C2 1

  

2) Choose two auxiliary nested codes A3

2 ⊂ A2 2.

A3

2 = [n2, v2 − λ3 2]q and A2 2 = [n2, v2]q.

Parity-check matrices of A2

2 and A3 2.

HA2

2

HA3

2 =

  • HA2

2

HA3

2|A2 2

  • Huang et al.

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SLIDE 10

Syndrome-Coupled Code Construction

Example: a family of 3-level rate-compatible codes C1 ≺ C2 ≺ C3. 1) Choose nested codes C3

1 ⊂ C2 1 ⊂ C1 1 = C1 = [n1, n1 − v1, d1]q.

Ci

1 = [n1, n1 − i m=1 vm, di]q for 1 ≤ i ≤ 3, d1 ≤ d2 ≤ d3.

Parity-check matrices of C1

1, C2 1, and C3 1.

HC1

1

HC2

1 =

  • HC1

1

HC2

1|C1 1

  • HC3

1 =

   HC1

1

HC2

1|C1 1

HC3

1|C2 1

  

2) Choose two auxiliary nested codes A3

2 ⊂ A2 2.

A3

2 = [n2, v2 − λ3 2]q and A2 2 = [n2, v2]q.

Parity-check matrices of A2

2 and A3 2.

HA2

2

HA3

2 =

  • HA2

2

HA3

2|A2 2

  • 3) Choose another auxiliary code A3

3 = [n3, v3 + λ3 2]q.

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Encoding

Given: Length-k information vector ✉ over Fq. ❝ ✉ s ❝ s ❝ ❛ s s ❝ ❝ ❛ ❝ ❝ s ❝ s ❝ ❛ ❛ ❛ s s ❝ ❝ ❛ ❛ ❝ ❝

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Encoding

Given: Length-k information vector ✉ over Fq. 1) Compute codeword in C1 ❝1 = EC1(✉) ∈ C1. s ❝ s ❝ ❛ s s ❝ ❝ ❛ ❝ ❝ s ❝ s ❝ ❛ ❛ ❛ s s ❝ ❝ ❛ ❛ ❝ ❝

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SLIDE 13

Encoding

Given: Length-k information vector ✉ over Fq. 1) Compute codeword in C1 ❝1 = EC1(✉) ∈ C1. 2) Compute extra redundancy for C2 s2 = ❝1HT

C2

1|C1 1

(compute syndrome s2 of ❝1) ❛2

2 = EA2

2(s2)

(encode syndrome s2) ❝2 = (❝1, ❛2

2)

(append to ❝1 to get ❝2 ∈ C2) s ❝ s ❝ ❛ ❛ ❛ s s ❝ ❝ ❛ ❛ ❝ ❝

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Encoding

Given: Length-k information vector ✉ over Fq. 1) Compute codeword in C1 ❝1 = EC1(✉) ∈ C1. 2) Compute extra redundancy for C2 s2 = ❝1HT

C2

1|C1 1

(compute syndrome s2 of ❝1) ❛2

2 = EA2

2(s2)

(encode syndrome s2) ❝2 = (❝1, ❛2

2)

(append to ❝1 to get ❝2 ∈ C2) 3) Compute extra redundancy for C3 s3 = ❝1HT

C3

1|C2 1

(compute syndrome s3 of ❝1) Λ3

2 = ❛2 2HT A3

2|A2 2

(compute syndrome Λ3

2 of ❛2 2)

❛3

3 = EA3

3(s3, Λ3

2) (encode coupled syndrome s3, Λ3 2 )

❝3 = (❝1, ❛2

2, ❛3 3) (append to ❝2 to get ❝3 ∈ C3)

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SLIDE 15

Encoding: Summary

Syndrome-coupled encoding: ❝1 = EC1(✉) ❝2 = (❝1, ❛2

2) =

  • EC1(✉), EA2

2(s2)

  • ❝3

= (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • c1

c2 c3 r2 r3

Key idea: generate and encode syndromes progressively. Generalizes to any number of levels. Applicable to many codes, e.g., BCH, RS, LDPC, and Polar.

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SLIDE 16

Minimum Distance

Theorem

Assume the auxiliary codes in the construction have minimum distances: dmin(A2

2)

= d2 − d1 dmin(A3

2) = d3 − d1

dmin(A3

3)

= d3 − d2 Then, the syndrome-coupled codes Ci, 1 ≤ i ≤ 3, have length Ni = i

j=1 nj, dimension k = n1 − v1, and minimum distance di.

C1

1 = [n1, n1 − v1, d1]

C2

1 = [n1, n1 − 2 i=1 vi, d2]

A2

2 = [n2, v2, d2 − d1]

C3

1 = [n1, n1 − 3 i=1 vi, d3]

A3

2 = [n2, v2 − λ3 2, d3 − d1]

A3

3 = [n3, v3 + λ3 2, d3 − d2]

C1 = [n1, k, d1]q ≺ C2 = [n1 + n2, k, d2]q ≺ C3 = [n1 + n2 + n3, k, d3]q.

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SLIDE 17

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 18

Correctable Error-Erasure Patterns

C1 = [n1, k, d1]q ≺ C2 = [n1 + n2, k, d2]q ≺ C3 = [n1 + n2 + n3, k, d3]q. ❝ ❝ ❛ ❛ ✉ s s ② ② ② ② ② ② ②

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SLIDE 19

Correctable Error-Erasure Patterns

C1 = [n1, k, d1]q ≺ C2 = [n1 + n2, k, d2]q ≺ C3 = [n1 + n2 + n3, k, d3]q. Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • ∈ C3.

Receive: ② = (② 1, ② 2, ② 3), ② ∈ (Fq ∪ {?})n1+n2+n3. ② ②

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SLIDE 20

Correctable Error-Erasure Patterns

C1 = [n1, k, d1]q ≺ C2 = [n1 + n2, k, d2]q ≺ C3 = [n1 + n2 + n3, k, d3]q. Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • ∈ C3.

Receive: ② = (② 1, ② 2, ② 3), ② ∈ (Fq ∪ {?})n1+n2+n3. For 1 ≤ i ≤ 3, let ti and τi denote the number of errors and erasures in the sub-block ② i of the received word ②.

Theorem

The code C3 can correct any combined error and erasure pattern that satisfies the following conditions: 2t1 + τ1 ≤d3 − 1, 2t2 + τ2 ≤d3 − d1 − 1, 2t3 + τ3 ≤d3 − d2 − 1.

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SLIDE 21

Sequential Decoding

Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). ❛ ② s ❛ ❛ ❛ ② s ❛ s s ❝ ❝ ② s s ✉ ❝ ✉

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SLIDE 22

Sequential Decoding

Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). 1) ❛3

3 = DA3

3(② 3)

( s3, Λ3

2) = E−1 A3

3 (

❛3

3)

  • Λ3

2 determines the coset of A3 2 ⊂ A2 2 that ❛2 2 lies in.

❛ ② s ❛ s s ❝ ❝ ② s s ✉ ❝ ✉

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SLIDE 23

Sequential Decoding

Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). 1) ❛3

3 = DA3

3(② 3)

( s3, Λ3

2) = E−1 A3

3 (

❛3

3)

  • Λ3

2 determines the coset of A3 2 ⊂ A2 2 that ❛2 2 lies in.

2) ❛2

2 = DA3

2(② 2|

Λ3

2)

  • s2 = E−1

A2

2 (

❛2

2)

( s2, s3) determines the coset of C3

1 ⊂ C1 1 = C1 that ❝1 lies in.

❝ ② s s ✉ ❝ ✉

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SLIDE 24

Sequential Decoding

Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). 1) ❛3

3 = DA3

3(② 3)

( s3, Λ3

2) = E−1 A3

3 (

❛3

3)

  • Λ3

2 determines the coset of A3 2 ⊂ A2 2 that ❛2 2 lies in.

2) ❛2

2 = DA3

2(② 2|

Λ3

2)

  • s2 = E−1

A2

2 (

❛2

2)

( s2, s3) determines the coset of C3

1 ⊂ C1 1 = C1 that ❝1 lies in.

3) ❝1 = DC3

1(② 1|

s2, s3) ˆ ✉ = E−1

C1

1 (

❝1) ✉

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SLIDE 25

Sequential Decoding

Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). 1) ❛3

3 = DA3

3(② 3)

( s3, Λ3

2) = E−1 A3

3 (

❛3

3)

  • Λ3

2 determines the coset of A3 2 ⊂ A2 2 that ❛2 2 lies in.

2) ❛2

2 = DA3

2(② 2|

Λ3

2)

  • s2 = E−1

A2

2 (

❛2

2)

( s2, s3) determines the coset of C3

1 ⊂ C1 1 = C1 that ❝1 lies in.

3) ❝1 = DC3

1(② 1|

s2, s3) ˆ ✉ = E−1

C1

1 (

❝1) Output: ˆ ✉.

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SLIDE 26

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 27

Capacity-Achieving Rate-Compatible Codes

Goal: A family of rate-compatible codes that achieve the capacities of a set of degraded q-ary symmetric channels simultaneously.

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SLIDE 28

Capacity-Achieving Rate-Compatible Codes

Goal: A family of rate-compatible codes that achieve the capacities of a set of degraded q-ary symmetric channels simultaneously.

Channels W1 ≻ W2 ≻ W3, capacities C(W1) > C(W2) > C(W3). Any rates R1 > R2 > R3 such that Ri < C(Wi). Rate-compatible codes C1 ≺ C2 ≺ C3, where Ci has rate Ri. For code Ci over Wi, error probability P(Ni)

e

(Ci) → 0, as Ni → ∞.

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SLIDE 29

Capacity-Achieving Rate-Compatible Codes

Goal: A family of rate-compatible codes that achieve the capacities of a set of degraded q-ary symmetric channels simultaneously.

Channels W1 ≻ W2 ≻ W3, capacities C(W1) > C(W2) > C(W3). Any rates R1 > R2 > R3 such that Ri < C(Wi). Rate-compatible codes C1 ≺ C2 ≺ C3, where Ci has rate Ri. For code Ci over Wi, error probability P(Ni)

e

(Ci) → 0, as Ni → ∞.

Approach: Design syndrome-coupled rate-compatible codes using nested capacity-achieving codes as component codes.

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SLIDE 30

Capacity-Achieving Rate-Compatible Codes

Goal: A family of rate-compatible codes that achieve the capacities of a set of degraded q-ary symmetric channels simultaneously.

Channels W1 ≻ W2 ≻ W3, capacities C(W1) > C(W2) > C(W3). Any rates R1 > R2 > R3 such that Ri < C(Wi). Rate-compatible codes C1 ≺ C2 ≺ C3, where Ci has rate Ri. For code Ci over Wi, error probability P(Ni)

e

(Ci) → 0, as Ni → ∞.

Approach: Design syndrome-coupled rate-compatible codes using nested capacity-achieving codes as component codes.

Lemma

Consider a set of M degraded q-ary symmetric channels W1 ≻ W2 ≻ · · · ≻ WM. For any rates R1 > R2 > · · · > RM such that Ri < C(Wi), there exists a sequence

  • f nested linear codes CM

1 = [n, kM = RMn]q ⊂ CM−1 1

= [n, kM−1 = RM−1n]q ⊂ · · · ⊂ C1

1 = [n, k1 = R1n]q such that the error probability of Ci 1 over Wi, under

nearest-codeword (ML) decoding, satisfies P(n)

e (Ci 1) → 0, as n goes to infinity.

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SLIDE 31

Capacity-Achieving Rate-Compatible Codes

Goal: A family of rate-compatible codes that achieve the capacities of a set of degraded q-ary symmetric channels simultaneously.

Channels W1 ≻ W2 ≻ W3, capacities C(W1) > C(W2) > C(W3). Any rates R1 > R2 > R3 such that Ri < C(Wi). Rate-compatible codes C1 ≺ C2 ≺ C3, where Ci has rate Ri. For code Ci over Wi, error probability P(Ni)

e

(Ci) → 0, as Ni → ∞.

Approach: Design syndrome-coupled rate-compatible codes using nested capacity-achieving codes as component codes.

Lemma

Consider a set of M degraded q-ary symmetric channels W1 ≻ W2 ≻ · · · ≻ WM. For any rates R1 > R2 > · · · > RM such that Ri < C(Wi), there exists a sequence

  • f nested linear codes CM

1 = [n, kM = RMn]q ⊂ CM−1 1

= [n, kM−1 = RM−1n]q ⊂ · · · ⊂ C1

1 = [n, k1 = R1n]q such that the error probability of Ci 1 over Wi, under

nearest-codeword (ML) decoding, satisfies P(n)

e (Ci 1) → 0, as n goes to infinity.

Examples: Polar codes on DMC; BCH, Reed-Muller codes on BEC.

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SLIDE 32

Capacity-Achieving Rate-Compatible Codes

Rates of component codes must satisfy specified relations ❝ ❝ ❛ ❛ ✉ s s ② ② ② ② ② ② ②

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SLIDE 33

Capacity-Achieving Rate-Compatible Codes

Rates of component codes must satisfy specified relations Component codes (capacity-achieving with specified rates)

C1

1 = [n1, n1 − v1], R1

C2

1 = [n1, n1 − 2 i=1 vi], R2

A2

2 = [n2, v2], R2

C3

1 = [n1, n1 − 3 i=1 vi], R3

A3

2 = [n2, v2 − λ3 2], R3

A3

3 = [n3, v3 + λ3 2], R3

❝ ❝ ❛ ❛ ✉ s s ② ② ② ② ② ② ②

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SLIDE 34

Capacity-Achieving Rate-Compatible Codes

Rates of component codes must satisfy specified relations Component codes (capacity-achieving with specified rates)

C1

1 = [n1, n1 − v1], R1

C2

1 = [n1, n1 − 2 i=1 vi], R2

A2

2 = [n2, v2], R2

C3

1 = [n1, n1 − 3 i=1 vi], R3

A3

2 = [n2, v2 − λ3 2], R3

A3

3 = [n3, v3 + λ3 2], R3

Rate-compatible code rates

C1 = [n1, k]q (R1) ≺ C2 = [n1 + n2, k]q (R2) ≺ C3 = [n1 + n2 + n3, k]q (R3).

❝ ❝ ❛ ❛ ✉ s s ② ② ② ② ② ② ②

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SLIDE 35

Capacity-Achieving Rate-Compatible Codes

Rates of component codes must satisfy specified relations Component codes (capacity-achieving with specified rates)

C1

1 = [n1, n1 − v1], R1

C2

1 = [n1, n1 − 2 i=1 vi], R2

A2

2 = [n2, v2], R2

C3

1 = [n1, n1 − 3 i=1 vi], R3

A3

2 = [n2, v2 − λ3 2], R3

A3

3 = [n3, v3 + λ3 2], R3

Rate-compatible code rates

C1 = [n1, k]q (R1) ≺ C2 = [n1 + n2, k]q (R2) ≺ C3 = [n1 + n2 + n3, k]q (R3).

Decoding error probability over W3 Transmit: ❝3 = (❝1, ❛2

2, ❛3 3) =

  • EC1(✉), EA2

2(s2), EA3 3(s3, Λ3

2)

  • .

Receive: ② = (② 1, ② 2, ② 3). Decoding: ② 3 → ② 2 → ② 1.

P(N3)

e

(C3) ≤1 −

  • 1 − P(n1)

e

(C3

1)

  • 1 − P(n2)

e

(A3

2)

  • 1 − P(n3)

e

(A3

3)

  • → 0

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SLIDE 36

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 37

Example: 2-Level BCH-Based Rate-Compatible Codes

BCH component codes C2

1 = [8191, 7398]2 (t = 61) ⊂ C1 1 = [8191, 7697]2 (t = 38)

A2

2 = [398, 299]2 (t = 11)

❝ ❝ ❝ ❛

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SLIDE 38

Example: 2-Level BCH-Based Rate-Compatible Codes

BCH component codes C2

1 = [8191, 7398]2 (t = 61) ⊂ C1 1 = [8191, 7697]2 (t = 38)

A2

2 = [398, 299]2 (t = 11)

2-level rate-compatible codes C1 = [8191, k = 7697]2 ≺ C2 = [8589, k = 7697]2 R1 = 0.9397 > R2 = 0.8961

❝ ❝ ❝ ❛

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SLIDE 39

Example: 2-Level BCH-Based Rate-Compatible Codes

BCH component codes C2

1 = [8191, 7398]2 (t = 61) ⊂ C1 1 = [8191, 7697]2 (t = 38)

A2

2 = [398, 299]2 (t = 11)

2-level rate-compatible codes C1 = [8191, k = 7697]2 ≺ C2 = [8589, k = 7697]2 R1 = 0.9397 > R2 = 0.8961 Correctable error patterns

❝1 ∈ C1. Corrects 38 errors. ❝2 = (❝1, ❛2

2) ∈ C2. First sub-block (8191 bits) corrects 61 errors.

Second sub-block (398 bits) corrects 11 errors.

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SLIDE 40

Example: 2-Level BCH-Based Rate-Compatible Codes

BCH component codes C2

1 = [8191, 7398]2 (t = 61) ⊂ C1 1 = [8191, 7697]2 (t = 38)

A2

2 = [398, 299]2 (t = 11)

2-level rate-compatible codes C1 = [8191, k = 7697]2 ≺ C2 = [8589, k = 7697]2 R1 = 0.9397 > R2 = 0.8961 Correctable error patterns

❝1 ∈ C1. Corrects 38 errors. ❝2 = (❝1, ❛2

2) ∈ C2. First sub-block (8191 bits) corrects 61 errors.

Second sub-block (398 bits) corrects 11 errors.

For comparison, we use a shortened BCH code C3 = [8593, 7697]2 (t = 64), whose code length and rate are similar to those of C2.

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SLIDE 41

2-Level BCH-Based Codes for MLC Flash Memories

4000 5000 6000 7000 8000 9000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count FER

[8191, 7697], r=0.9397 [8589, 7697], r=0.8961 [8593, 7697], r=0.8957

4000 5000 6000 7000 8000 9000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count FER

[8191, 7697], r=0.9397 [8589, 7697], r=0.8961 [8593, 7697], r=0.8957

Left: lower page. The code C2 extends lifetime around 3500 cycles. Right: upper page. The code C2 extends lifetime around 2000 cycles. The code C2 is comparable to the shortened BCH code C3.

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SLIDE 42

Example: 2-Level LDPC-Based Rate-Compatible Codes

LDPC component codes

Use Reed-Solomon based construction1. Nested and 4-cycle free structure. C2

1 ⊂ C1 1 are two nested binary LDPC codes.

C1

1 is a (4, 64)-regular [8192,7697] LDPC code, r = 0.9396.

C2

1 is a (7, 64)-regular [8192,7400] LDPC code, r = 0.9033.

The auxiliary code A2

2 is a (4, 15)-regular [405,300] LDPC code.

2-level rate-compatible codes C1 = [8192, k = 7697]2 ≺ C2 = [8597, k = 7697]2 R1 = 0.9396 > R2 = 0.8953

1Ryan and Lin, Channel Codes: Classical and Modern, Cambridge Univ. Press, 2009. Huang et al. Syndrome-Coupled Rate-Compatible Codes

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SLIDE 43

2-Level LDPC-Based Codes for MLC Flash Memories

4000 5000 6000 7000 8000 9000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count FER

[8192,7697], r=0.9396 [8597,7697], r=0.8953

4000 5000 6000 7000 8000 9000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count FER

[8192,7697], r=0.9396 [8597,7697], r=0.8953

Left: lower page. The code C2 extends lifetime around 4000 cycles. Right: upper page. The code C2 extends lifetime around 3000 cycles.

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SLIDE 44

2-Level Rate-Compatible Codes for MLC Flash Memories

2000 4000 6000 8000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count

FER

[8192,7697], r=0.9396, LDPC [8597,7697], r=0.8953, LDPC−RC [8191, 7697], r=0.9397, BCH [8589, 7697], r=0.8961, BCH−RC [8593, 7697], r=0.8957, S−BCH

2000 4000 6000 8000 10000 10

−4

10

−3

10

−2

10

−1

10 Program/Erase (P/E) Cycle Count

FER

[8192,7697], r=0.9396, LDPC [8597,7697], r=0.8953, LDPC−RC [8191, 7697], r=0.9397, BCH [8589, 7697], r=0.8961, BCH−RC [8593, 7697], r=0.8957, S−BCH

At a higher rate of 0.94, the BCH code outperforms the LDPC code. The opposite conclusion holds for a lower rate of 0.90.

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SLIDE 45

Outline

1

Introduction and Background

2

Syndrome-Coupled Code Construction

3

Correctable Patterns and Decoding

4

Capacity-Achieving Rate-Compatible Codes

5

Applications to MLC Flash Memories

6

Summary

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SLIDE 46

Summary

Introduced rate-compatible error-correcting codes. Developed a new, general algebraic construction based upon syndrome-coupled encoding, with a sequential decoding algorithm. Studied the minimum distance properties and correctable error patterns of the codes. Proved the capacity-achieving property of our construction and equivalence to recent capacity-achieving polar code schemes. Applied 2-level rate-compatible codes to MLC flash memories.

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SLIDE 47

Thanks

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