SLIDE 44 2-Level Rate-Compatible Codes for MLC Flash Memories
2000 4000 6000 8000 10000 10
−4
10
−3
10
−2
10
−1
10 Program/Erase (P/E) Cycle Count
FER
[8192,7697], r=0.9396, LDPC [8597,7697], r=0.8953, LDPC−RC [8191, 7697], r=0.9397, BCH [8589, 7697], r=0.8961, BCH−RC [8593, 7697], r=0.8957, S−BCH
2000 4000 6000 8000 10000 10
−4
10
−3
10
−2
10
−1
10 Program/Erase (P/E) Cycle Count
FER
[8192,7697], r=0.9396, LDPC [8597,7697], r=0.8953, LDPC−RC [8191, 7697], r=0.9397, BCH [8589, 7697], r=0.8961, BCH−RC [8593, 7697], r=0.8957, S−BCH
At a higher rate of 0.94, the BCH code outperforms the LDPC code. The opposite conclusion holds for a lower rate of 0.90.
Huang et al. Syndrome-Coupled Rate-Compatible Codes
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