SuperNova burst buffer ( NVMe from Zynq ) Roy Wastie University of - - PowerPoint PPT Presentation

supernova burst buffer nvme from zynq
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SuperNova burst buffer ( NVMe from Zynq ) Roy Wastie University of - - PowerPoint PPT Presentation

SuperNova burst buffer ( NVMe from Zynq ) Roy Wastie University of Oxford 1 17/10/19 DUNE-UK DAQ workshop Specifcation SSD NVMe on the PS of the ZYNQ PCIe Gen2 (4 lanes). Data transfer rate @ 1.6GB/s for >50GB (100s). Data


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SLIDE 1

SuperNova burst buffer ( NVMe from Zynq )

Roy Wastie University of Oxford

17/10/19 DUNE-UK DAQ workshop 1

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SLIDE 2

Specifcation

  • SSD NVMe on the PS of the ZYNQ PCIe Gen2 (4 lanes).
  • Data transfer rate @ 1.6GB/s for >50GB (100s).
  • Data source from the PL side of the ZYNQ.
  • DMA from PL to PS memory.
  • Transfer PS Memory to SSD.
  • The SN trigger rate?.
  • Empty SSD at a slower rate in background.
  • No Dead Time.

17/10/19 2 DUNE-UK DAQ workshop

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SLIDE 3

Evaluation Board with SSD

3

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SLIDE 4

SSD Read/Write Status

  • Tests on the ZCU102 Eval Board

show that we can transfer 1.6GB/s sustained to the SSD > 50GB transferred with LINUX OS using the FIO command.

  • Can it maintain this will DMAing

data from the PL?.

17/10/19 4 DUNE-UK DAQ workshop

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SLIDE 5

Current Plans

  • Develop test firmware to DMA data from the PL to PS.
  • Develop Software on the PS to Setup/control the DMA
  • Develop Software on the PS to write the data to the SSD drive.

17/10/19 5 DUNE-UK DAQ workshop

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SLIDE 6

SSD Write

17/10/19 6 DUNE-UK DAQ workshop

Data Interface

Frame Size AXI_En En Clk

S_AXIS M_AXIS S_AXIS AXI DMA AXI GPIO S_AXI

Clk

S_AXI M_AXIS Interrupt

(Memory mapped)

Clk

IRQ S_AXI HP0 M_AXI GP0

ZYNQ PS

ARM Cores DRAM Controller

DRAM SSD

PCIe

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SLIDE 7

DMA Test Design

17/10/19 7 DUNE-UK DAQ workshop

Pattern Generator

Frame Size AXI_En En Clk

S_AXIS M_AXIS S_AXIS AXI DMA AXI GPIO S_AXI

Clk

S_AXI M_AXIS Interrupt

(Memory mapped)

Clk

IRQ S_AXI HP0 M_AXI GP0

ZYNQ PS

ARM Cores DRAM Controller

DRAM

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SLIDE 8

Firmware Design

17/10/19 8 DUNE-UK DAQ workshop

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SLIDE 9

Bare Metal Software for ARM Host

  • Initializes the system (First Stage Boot Loader)
  • Enables the PL clocks and PS-PL AXI interfaces
  • Programs the AXI DMA engine
  • Programs the Pattern Generator through the AXI GPIO

17/10/19 9 DUNE-UK DAQ workshop