Strain and Temperature Dependence of Defect Formation at AlGaN/GaN - - PowerPoint PPT Presentation

Strain and Temperature Dependence of Defect Formation at AlGaN/GaN High Electron Mobility Transistors on a Nanometer Scale

Chung-Han Lin

Department of Electrical & Computer Engineering, The Ohio State University

Tyler A. Merz and Daniel R. Doutt

Department of Physics, The Ohio State University

Jungwoo Joh and Jesus del Alamo

Microsystems Technology Laboratory, Massachusetts Institute of Technology

Umesh K. Mishra

Electrical & Computer Engineering, University of California, Santa Barbara

Leonard J. Brillson

Departments of Electrical & Computer Engineering and Physics

Symposium G: Reliability and Materials Issues of III-V and II-VI Semiconductor Optical and Electron Devices and Materials II

Outline

Device Conditions: ON-state vs. OFF-state stress Techniques: DRCLS, KPFM, ID &IGOFF vs. VDS Conclusions: (1) Dominant impact of VDS vs. IDS on device reliability (2) Primary defects located inside AlGaN Background : AlGaN/GaN HEMT physical degradation mechanisms – Historical efforts Electric field vs. Thermal stress : Surface potential, leakage current, defect generation  Failure prediction

Motivation

AlGaN/GaN HEMT: high power, RF, and high speed applications Reliability challenge: Hard to predict failure High current, piezoelectric material, & high field due to high bias  Defect generation Micro-CL, AFM, and KPFM: Follow evolution

• f potential, defects, and failure

Background: All-Optical Methods

[1] M. Kuball et al. IEEE Electron Device Lett. 23, 7 (2002) [2] A. Sarau et al. IEEE Trans. Electron Devices, 53, 2438 (2006) Shigekawa et al. J. Appl. Phys. 92, 531 (2002)

Raman/IR Technique PL Technique

Background: Scanned Probe Methods

Aubry et al. IEEE Transactions on Electron Device, 54, 385 (2007)

Lin et al. Appl. Phys. Lett., 95, 033510 (2009) SThM Technique DRCLS Technique

• A. P. Young et al., Appl.
• Phys. Lett, 77, 699 (2000)

EG versus T T versus Gate-Drain Location

2DEG AlGaN Buffer layer

T, σ, defects, atomic composition

Drain Gate GaN source Substrate

(10%) JEOL JAMP 7800F : SEM, Micro-CL

Depth and Laterally-Resolved CLS

(25%) 10 nm 50 nm

5 kV, 10 nm beam

20 40 60 80 100 120 140 160 180 200

0.0000 0.0005 0.0010 0.0015 0.0020 0.0025 0.0030 0.0035

GaN AlN Grading AlGaN

Intentisty (a.u.) Depth (nm) 1 keV 2 keV 3 keV 4 keV 5 keV

AlGaN

Background: Temperature Maps

September 19-24 2010 Tampa, Florida, USA

W.D. Hu et al. J. Appl. Phys. 100, 074501 (2006)

• I. Ahmad et al. Appl. Phys. Lett. 86,

173503 (2005)

• Hottest spot at drain-side gate

edge

• Hot spots also inside GaN buffer

C.-H. Lin et al, IEEE Trans. Electron Devices

Electroluminescence Results: Gap States

Meneghesso et al. IEEE Tran. Device Mater. Rel., 8, 332 (2008) Bouya et al. Microelectron. Reliab., 48, 1366 (2008) Nakao et al. Jpn. J. Appl. Phys., 41, 1990 (2002)

Electroluminescence detects gap states forming inside HEMT during operation

80°C 10°C

Electrochemically-Produced Defects

Smith et al. ECS Transactions, 19, 113 (2009) Park et al. Microelectron. Reliab., 49, 478 (2009)

High C, O, and Si concentrations at gate foot “lattice disruption” area Gate leakage current promotes electrochemical reaction

Impact of Structural Defects

September 19-24 2010 Tampa, Florida, USA

Chowdhury et al. IEEE Electron Device Lett. 29, 1098 (2008) Park et al. Microelectron. Reliab. 49, 478 (2009) Joh et al. IEEE Electron Dev.

• Lett. 29, 287 (2008)

High field at drain - side gate can form structural defects that affect IG-OFF & ID

Inverse Piezoelectric Effect and Defects

del Alamo et al. Microelectron. Reliab., 49, 1200 (2009) Joh et al. Microelectron. Reliab., 50, 767 (2010) Sarua et al. Appl, Phys. Lett., 88, 103502 (2006)

VDS + Vinv

piezo → strain energy

→ exceed elastic energy of crystal → form defects at gate foot

Very high local strain fields

Measurement Strategy

• Thermal Mapping: DRCLS NBE laterally (<10

nm) & in depth (nm’s to µm’s)

– Obtain T vs. IDS; locate “hot” spots

• Stress Mapping: DRCLS NBE near gate foot vs.

VDS with IDS OFF (no heating)

• Potential Mapping: Kelvin work function vs. VDS

with IDS OFF (no heating)

• Device testing: Step-wise ON & OFF-state IDMAX

and IGOFF vs. VDS

• Defect Generation: CLS defect peak intensities
• vs. thermal and electrical stress
• Defect Localization: DRCLS intensities vs. depth

Stress Conditions

Reference: No stress ON-state stress: high ID, low VDS (ID = 0.75 A/mm, VDS = 6 V, VG = 0 V) OFF-state stress : low ID, high VDS (ID = 5*10-6 A/mm, VDS = 10 ~ 30 V VG = -6 V) IGOFF taken at VDS = 0.5 V, VGS = -6 V

Gate Drain Source

AFM & KPFM scanning area

Lower Upper

Aim: Test electric field-induced strain vs. current- induced (e.g., heating) mechanism

Strain Measurements: Drain-side Gate Foot

26 meV CL shift = 1 GPa ; VDG = 32 V  0.27 GPa Applied voltage blue-shifts band gap, increases mechanical strain at drain-side gate foot

ON-state

Band Gap vs. VDG Strain vs. VDG

C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)

IDMAX, IG-OFF vs. Time & Applied Voltage

OFF-state IG-Off rises sharply at threshold VDG ON-state IG-OFF decreases vs. time → device degradation with external stress OFF-state ON-state

Surface Potential Evolution (OFF-state)

D S G

Low potential regions appear and expand with increasing applied stress VDG

C.H. Lin et al. Appl. Phys.

• Lett. 97, 223502 (2010)

Surface Potential Evolution (ON-state)

D S G

Current stress seems to degrade device in a different way

Device Failure under OFF-state Stress

Failure area Gate Drain Source Drain Source Gate Before failure After failure

• Device failure occurs as VDG increases further
• Large, cratered failure area appears; morphology of

drain metal exhibits huge change

Correlation between AFM, KFPM & SEM

15 μm

Drain Source Gate

AFM KPFM SEM

Before failure After failure AFM, KPFM and SEM results reveal that device fails at the lowest surface potential area, where defect density is highest

Defect Spectroscopy of Low Potential Region

Within low potential region and at depth of 2DEG, DRCLS reveals formation of deep level defects

C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)

Defect Generation vs. Location

Largest defect increase at lowest potential region

C.-H. Lin et al, IEEE Trans. Electron Devices

Areas of highest defect intensities and highest stress correlate Lower defect creation for On-state stress

Defect Generation vs. Potential

Increasing defects densities correlate with decreasing potential

Surface Potential vs. Electrical Stress

σ- = σ0/[1+exp[(EF – Ea)/kT]] qΔV = q2 σad/ε

OFF-state

Φ ET EC EV EF ΔV

• EF moves lower in gap as

acceptor-like defects increase

• Drain-side surface potential

decreases (Φ increases) with increasing VDG

• Above VDG threshold, faster

decreases at low Φ patches

5 10 15 20 25 30 35 40

• 3.0
• 2.5
• 2.0
• 1.5
• 1.0
• 0.5

0.0 0.5 1.0 1.5

A3 A4 A5 A6

Normalized Averaged Surface Potential

VDG (Volt) 1 10

Defect density (10

12/cm 2)

8 nm 7 nm 9 nm

5 10 15 20 25 30 35 40

• 0.2

0.0 0.2 0.4 0.6 0.8 1.0

A1 A2 Normalized Averaged Surface Potential

VDG (Volt)

C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)

• Higher Φ patches

decrease slower

CLS Energy Comparison with Trap Spectroscopy

• DLOS: 3 traps observed: EC-0.55 (dominant), 1.1, &1.7-1.9 eV
• DRCLS: 2.8 eV BB and 2.3 eV YB emissions: Traps that grow

under DC stress – high 1012 cm-2 densities

0.55 eV 2.8 eV 2.3 eV EC EV 1.1 eV GaN 3.4 eV KPFM Ea = 0.55 Activation Energy: S. Kamiya, M. Iwami, T. Tsuchiya, M. Kurouchi, J. Kikawa, T. Yamada, A. Wakejima, H. Miyamoto, A. Suzuki, A. Hinoki, T. Araki, and Y. Nanishi, Appl.

• Phys. Lett. 90, 213511 (2007); M. Arakawa, S. Kishimoto, and
• T. Mizutani, Jpn. J. Appl. Phys. Part I 36, 1826 (1997)

High DLOS 1012 cm-2 Trap Density: A. R. Arehart, A. C. Malonis, C. Poblenz, Y. Pei, J. S. Speck, U. K Mishra, S. A. Ringel, Phys. Stat. Sol. C 1-3 (2011) DOI 10.1002/pssc.201000955 0.55 eV 3.6 eV 2.8 eV EC EV 1.35 eV AlGaN 4.1~4.2 eV

AlGaN/GaN HEMT Defect Location

Pre-stress Post-stress Source Source Drain Drain

• New 3.6 eV feature 0.5-0.6 eV below EC → BB defect within AlGaN
• Larger 2.2 eV threshold feature → higher YB defects with stress
• Higher Drain-side vs. Source-side changes: consistent with DRCLS

2.2 Before stress After stress – source side After stress – drain side

AlGaN/GaN HEMT Physical Degradation Mechanisms

del Alamo et al. Microelectron. Reliab., 49, 1200 (2009)

Inverse Piezoelectric Effect

• M. Kuball, et al., Microelectron.
• Reliab. 51, 195 (2011)

Strain- and Field-induced Impurity Diffusion Electronically-Active Defect Formation Multiple possible mechanisms that all create electronically- active defects

1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5 10 15 20

AlGaN NBE FK-shift

BB 2.8 eV) YB 2.25 eV) EB (keV) GaN NBE

1 1.5 2 3 4 5 6 7 8 CL Intensity (a.u.) Photon Energy (eV) 9

AlGaN NBE

AlGaN/GaN HEMT Defect Location

• BB peak shifts with AlGaN → BB defect in AlGaN
• Shifted AlGaN NBE and BB features appear only when

excitation reaches 40 nm Al0.22Ga0.78N layer → Additional piezoelectric strain field

240 220 200 180 160 140 120 100 80 60 40 20 0.000 0.001 0.002 0.003 0.004 0.005

GaN AlN : 0.7 nm Al0.22Ga0.78N ; 40 nm

Excitation Intensity (a.u.) Depth (nm)

1 keV 2 keV 3 keV 4 keV 5 keV 6keV

AlGaN:Si grading layer ( 0 < x < 0.22) ; 10 nm

Conclusions

DRCLS measures electric field-induced stress and current-induced heating on a nanoscale during OFF-state and ON-state operation KPFM maps reveal expanding low potential patches where defects form and device failure will occur Nanoscale patch potential and defect evolution inside AlGaN vs. VDG threshold effect at drain-side gate foot support inverse piezoelectric degradation model Separation of field- vs. current-induced degradation demonstrates their relative impact

• n AlGaN/GaN reliability