Status of GRL Yun-Tsung Lai KEK ytlai@post.kek.jp 32nd B2GM February 5, 2019 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 1
Outline • Jitter between each sub- triggers’ input and latency study. • GRL logic confirmation with cosmic data. • B2L suppress mode for TRG boards. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 2
Jitter between inputs • CDC: first 2D track input in this event. • Uncertainty of KLM latency will be reduced after their FE firmware update. CDC TOP: 400~1300 ns CDC ECL: 300~1000 ns CDC KLM: -700~1500 ns ECL L1: 818~1151 ns • trgdelay = 11 (32ns clk) • Offset from the right edge to L1 trg: ~13*32 ns 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 3
Jitter between inputs (cont’d) • Waiting to KLM input to fix their latency. • For GRL GDL link, CDC 2D associated bits will still use GTH. For the other bits associated with outer detectors will use LVDS. Latency is ~8 ns. • Latency of 3D and NN will be checked soon. Latency limit Latency limit in GRL (GTH) in GRL (LVDS) First 2D track ECL input 750 1500 0 CDC KLM: -700~1500 ns CDC ECL: 300~1000 ns CDC drift time: 500ns CDC TOP: 400~1300 ns ECL L1: 818~1151 ns L1: 1500~1800 ns GRL GDL latency: ~450 ns 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 4
Matching logic: CDC-ECL offline check expected result • All bits are correct now. – Matched, and matched with 2 GeV. 𝜚 map of CDC and ECL consistency check – Photon: 1 GeV and 2 GeV. firmware readout firmware logic 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 5
Matching logic: CDC-TOP and CDC-KLM • CDC-TOP case looks fine. • CDC-KLM case looks still not so consistent. Under investigation. – Some of the N = 1 in firmware is actually N = 2. – No angular dependency. – Large latency events might be a reason: The input is too late for the logic and the output is out of B2L window. – Will tune the persistor size to check. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 6
Check on ECL cluster output • ETM is using a window collect TC info within two dataclks for clustering to avoid missing TC at edge. – Possible problem: an energetic TC is counted twice, then causes two similar clusters in continuous dataclks. 1 st clk 2 nd clk • Check with cosmic run r2888. – Energy, theta, and phi difference of each 1 st clk and 2 nd clk combination. • We can see a peak at difference = 0 for energy, theta, and phi. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 7
Relation between variables • For Δ𝐹 = 0: – With Δ𝜄 = 0: 94.3% – With Δ𝜚 = 0: 93.3% – With Δ𝜄 = 0 & Δ𝜚 = 0 : 93.1% For Δ𝜄 = 0: • For two clusters in two continuous clks – With Δ𝐹 = 0: 31.5% with the same energy, it is very likely for – With Δ𝜚 = 0: 51.6% them to be nearby. – With Δ𝐹 = 0 & Δ𝜚 = 0 : 31.1% For Δ𝜚 = 0: • – With Δ𝐹 = 0: 42.2% – With Δ𝜄 = 0: 69.7% – With Δ𝐹 = 0 & Δ𝜄 = 0 : 42.1% 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 8
Relation between variables (cont’d) For Δ𝐹 = 0: • – Not necessary to be an energetic cluster? 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 9
B2L in TRG • B2L of TRG: snapshot on waveform within a window. Too many zero. • CB: To handle delay and width of data window . – EX: GRL uses 1k*24 clk. CB is 1k*512 clk. • Parallel DAQ buffers: To handle 2 events with very close L1trg into pipeline. – EX: GRL uses 1k*24 clk*N (N = 12) L1trg delay width of data window Parallel DAQ buffer Serialization, then into b2l_transmitter 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 10
B2L suppress mode in TRG • GRL: timing/waveform is not so important due to latency difference between inputs. – Better to record only 1 bit for “On or Off” info: b2b, opening, N(track…). – Integrate those signals on time. • Original idea: take a window with a delay w.r.t L1trg. • Suppress mode: take one clock with a (no) delay w.r.t L1trg. – Only need to change the parameter width to 1. – The size of CB (Block RAM usage) can be slightly reduced. (512 ~32) – The size of DAQ buffer can be reduced. (1k*24 clk*N 1k*1 clk*N) delay (could be 0) L1trg width = 1 Parallel DAQ buffer Serialization, then into b2l_transmitter 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 11
ISIM test • b2lwe: valid signal to b2l core logic. Synchronized to the serialized data. • b2lpause: to distinguish header and data. • b2lout: Serialized 1k (1clk) data in 8 bits • Original CB: 1k*24 clocks in total • Suppress mode: dataout: 1k*24 1k • b2lwe/b2lpause/b2lout: Correctly behave as this change. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 12
Utilization • 1b On/Off information: Persist it up to when L1trg arrives. • For the other cases, a signal would store multiple information in different clocks. – EX: ETM sends cluster output to GRL in 1~2 dataclk. – Have to prepare enough bandwidth to persist those signals parallelly. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 13
Firmware test result • GRL firmware: 1k*24 clks 1k*1 clk • No problem in local run. • 1k in each event: 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 14
Summary & To do • By using cosmic data after phase2, matching logics in GRL (CDC - ETM, TOP, KLM) are mostly confirmed to be working. Latency are measured. – Most of the trg bits are ready. • B2L suppress mode is tested with latest version of CB. – Full GRL firmware with it is ready. – Hope to test it in this week to see the data size reduction, trg dead time, and busy. • Short-term schedule for GRL work: – Test firmware with B2L suppress mode for DAQ check: This week. – Unpacker and data analysis for suppress mode: ~ End of Feb. – 3D/NN counting with z0 cut: Waiting now. Before phase3? – Firmware update for short tracking + TSF GTX link: Middle of Mar. After TSF work is completed. – Unpacker and data analysis with short tracking: Early phase3. – Official unpacker and DQM. 2019/02/05 Yun-Tsung Lai (KEK) @ 32nd B2GM 15
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