Status of Delta-DOR Cross-Support Activities at JPL James S. - - PowerPoint PPT Presentation

Status of Delta-DOR Cross-Support Activities at JPL

James S. Border Jet Propulsion Laboratory

2017 CCSDS Spring Meeting San Antonio, Texas, May 10-12, 2017

Jet Propulsion Laboratory

California Institute of Technology

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Current Cross-Support Activity

CCSDS Meeting, San Antonio, Texas, May 10-12, 2017

• DDOR cross-support continues for Hayabusa-2



A few passes completed in 2017



More passes planned for 2018-2020



Requested support overlaps with DSN contention periods for Mar missions in 2018 and 2020

• JPL is nearing completion of ISRO MOM DDOR cross-support



Zodiac/Cortex open loop receiver has worked well at Bangalore 32m

• DSN will likely provide DDOR cross-support for several missions in

the 2020 Mars opportunity window

Jet Propulsion Laboratory

California Institute of Technology

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Open Loop Receiver Upgrades at JPL-1

CCSDS Meeting, San Antonio, Texas, May 10-12, 2017

• New OLR implementation in progress

 Part of the all-digital DSN “Common Platform”  RF sub-band downconverted and digitized

• X-band is 8200-8600 MHz
• Ka-band is 31800-32300 MHz

 Same digital IF is fed to both closed-loop and open-loop

processors

 Each OLR can accept data from up to 16 frequency channels

• Each frequency channel can be from either same or different RF

 Higher open loop data recording rate is possible

• 512 Mbit/s or higher

 Planned operational date: January 2018

Jet Propulsion Laboratory

California Institute of Technology

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Open Loop Receiver Upgrades at JPL-2

CCSDS Meeting, San Antonio, Texas, May 10-12, 2017

• Native data recording format to be RDEF
• DDOR SW will be updated to directly process RDEF
• Testing will be possible

 Concurrent recording on WVSR and OLR  Data translation between VDR and RDEF

• OLR will be available to support Bepi PN ranging at 24

Mcps

 SW is being developed to process PN T2B ranging from

WVSR/OLR recordings

• JPL is planning to support high chip rate PN ranging only

with open loop recordings

 Low chip rates (e.g. 3 Mcps) can also be supported by closed

loop processing