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SOFTWARE SERIES OF LECTURES EFIMOV S.V. ACS CONCEPT Automatic - PowerPoint PPT Presentation

COMPUTER-AIDED SYSTEM SOFTWARE SERIES OF LECTURES EFIMOV S.V. ACS CONCEPT Automatic Control System (ACS) is a set of hardware and software tools that provide an automated collection, processing, transmission and storage of data necessary


  1. PROJECT MANAGER • Presentation of all developed project components and its structure • Project components operation (development, renaming, transmission, copying, deleting) • Project resources setting • Project library management (login of existing libraries, development and adding of associated libraries) • Project hardcopy preparation that includes: • Textual representation; • Project components and variables declaration part description; • Developed project resources – PLC format, global variables list and description, project tasks list, attached libraries list • Project variables cross references list 29

  2. PLC STRUCTURE The source environment to develop the PLC code has a well-defined structure. The tree or design structure are displayed in project manager while its development. Project tree 30

  3. TASKS The tasks main goal is to manage the project program performance executed by a PLC processor. Every task has a personal unique identity (its name). A separate task can manage the whole range of programs that are executed in every PLC cycle. It is possible to create several tasks both of similar and different types within one project. 31

  4. TASKS task attributes task manager 32

  5. RESOURCES This resource includes a processor and its native runtime system where the reviewed tasks are downloaded. project resources 33

  6. RESOURCES • Declaration part of directly addressable and global variables • Attachable libraries manager • PLC configuration tool • System target settings: microprocessor type, memory layout, network parameters, and other settings • Tasks manager 34

  7. FORMAT The format intermixes a variety of resources that follow a certain law. One system can contain several resources, each of them has a processor, a memory and a runtime system in hand. Such resources can be true appliances remote from each other, and they can also be virtual that are emulated by one process. All these appliances have an access to a certain hardware base (input-output modules), and their performance and collaboration are coordinated via the project global variables. 35

  8. FORMAL AND CURRENT PARAMETERS Component name, its input and output variables form the component interface. The input parameters are called formal. When the component is used, the external variables that have certain values are connected to the input variables and such parameters are called current. Thus, when the component is called, its parameters have current values that are delivered to the component, processed according to the algorithm inside this component and then the values that are recorded as current parameters, are output. 36

  9. COMPONENT VARIABLES Declaration part of component variables contains several types of variables: VAR_INPUT, VAR_OUTPUT, VAR, VAR_IN_OUT declaration part of component variables 37

  10. FUNCTIONS Function is a program component that displays a variety of input values at the output. The function always returns only one value (that can consist of several elements if it is a bit field or a layout). The variable name is a kind of output variable where the calculation data are written. When the function is declared, the type of a return value, the function name and input parameters are designated. 38

  11. FUNCTION BLOCKS Function block is a program component that accepts, processes and returns any quantity of values. A function block instance is called in a program code. Rather than functions, the function blocks do not form the return values. After the function block instance execution all values of its variables are saved up to the next call-in. As the function blocks have an internal memory and keep the variables values, the called instances with the similar input data can have variable output data. 39

  12. PROGRAMS Program is a global program component that is able to form the don’t care values at the time of calculations. All variable values are saved after the program execution and are kept up to the next call-in. Rather than function blocks, the programs do not have instances, they are global components of the whole project and are set at the project resources level. 40

  13. IL LANGUAGE IL language (Instruction list) – a list of instructions. It is a common assembler program with a result register and tab transitions. The set of instructions is standard and does not depend on a well-defined target. Each instruction is recorded on a separate line. Instruction can include four fields separated by the space bar spaces or tabulation characters: tab: statement operand comment 41

  14. RESULT REGISTER • The majority of IL instructions executes some operation with the result register content • IL result register content is a general-purpose container that is able to save the variables values of any type 42

  15. TAB TRANSITION IL program is executed without interruption, downwards. To change the cycles execution order the tab transition is used. LD 1 (*value download in a result register*) ST Counter (*result register value assignment to a variable*) loop1: LD Counter (*Counter download to result register*) ADD 1 (*addition of 1 to result register*) ST Counter (*result register value assignment to Counter*) LE 5 (*result register value check <= 5*) JMPC loop1 (*tab transition*) 43

  16. BRACKETS The consecutive order of IL instructions execution can be changed with the help of brackets. The opening bracket is put in instruction after the execution. The closing bracket is put in a separate line. Instructions put in brackets are executed first of all. LD 5 MUL (2 SUB 1 ) ST y (*y=5*(2-1)=5*) LD 5 MUL 2 SUB 1 ST y (*y=5*2-1=9*) 44

  17. MODIFIERS statement modifier description LD N Download the operand value in result register ST N Assign the result register value to the operand If the result register is TRUE, install the logical operand S (TRUE) If the result register is TRUE, discard the logical operand R (FALSE) AND N, ( Bitwise-AND OR N, ( Bitwise-OR XOR N, ( Bitwise-OR NOT Result register bitwise converse ADD ( Addition SUB ( Subtraction MUL ( Multiplication DIV ( Division 45

  18. MODIFIERS statement modifier description MOD ( Division modulo GT ( > GE ( >= QE ( = NE ( < > LE ( <= LT ( < JMP CN Tab transition CAL CN Function block calling POU exit and retrieve to the called program RET CN 46

  19. ST LANGUAGE ST language (Structured Text) – a high level language. Syntactically ST language is a Pascal tailored language. Instead of Pascal algorithm St language uses the components of IEC standard programs. 47

  20. LD LANGUAGE • Ladder diagram language (LD) or relay contact circuit language (RCC) – a graphic language that carries out electric circuits structures. • LD-diagram is presented as two column power rails. There some circuits between them that are formed by contact points spiking. Relay is a circuit load. Every relay has contact points that can be used in other circuits. 48

  21. LD LANGUAGE USED indication Normally open contact Normally close contact Relay winding 49

  22. FBD LANGUAGE FBD (Function Block Diagram) – a graphic programming language. FBD diagram contains components that are displayed by means of rectangles on the diagram. POU inputs are displayed on the left of the rectangle, the outputs – on the right. The POU type and input-output indications are displayed inside the rectangle. 50

  23. CONNECTING LINES POU rectangles in FBD are connected by connecting lines. Connections are directed from left to right. Block input can be connected to the block output that is on its left. Besides that, the input can be connected to the variable or to the constant. This connection should link variables or inputs and outputs of one type. Unlike the component, the variable is shown on a diagram without a rectangular frame. 51

  24. EXECUTION ORDER FBD-circuits execution is done from left to right, downwards. The blocks that are on the left are executed before. The block starts to be calculated when the values of all its inputs are calculated. The further calculations won’t be done until the values at all outputs are calculated. In other words, the values at all picture box outputs appear simultaneously. The circuit calculation is considered completed only when the values at all its elements outputs are calculated. 52

  25. NOT-SIGNAL The logic signal inversion in FBD is displayed as a circumference on connection, before the input or the variable. Inversion is not a characteristic of the block itself and can be easily added or cancelled in the diagram. 53

  26. CONNECTORS Connectors are a named connection that can be broken and transferred in the next circuit. Such method can be useful at a determined width of FBD editor window. The standard does not ban connections that go from the block output to their input or to the input of blocks that were executed before. The feedback does not form a cycle that is similar to FOR. It means that some calculated value is transferred to the input when the diagram is called next time. 54

  27. TABS AND TRANSITIONS The diagram FBD-circuits execution order can be forcedly changed using the tabs and transitions exactly as in relay wiring. The tab is put at the beginning of any circuit and it is a name of this circuit. The circuit can contain only one tab. The tab names follow the common rules of IEC identifier naming. The graphic editor numbers automatically the diagram circuits. This numbering is applied only to document and cannot replace the tabs. 55

  28. SFC LANGUAGE In IEC language family the SFC (Sequential Function Chart) diagrams are higher than other four languages. The SFC diagrams are a high level graphic tool. 56

  29. INCREMENT SIZES The increment sizes in SFC programs are displayed as rectangles. An actual increment size action is described in a programming system separate window and is not displayed in the diagram. The name of the SFC increment size or, if it is not enough, a brief text description (comment) show its purpose. 57

  30. TRANSITIONS There is a horizontal line below the increment size on the connecting line that defines a transition. A logic variable, a logical expression, the constant or a direct address can be transition condition. The transition is done if two conditions are followed: • Transition is permitted ( the corresponding increment size is active); • Transition condition has a TRUE value. 58

  31. SIMULTANEOUS BRANCHES In theory the simultaneous branches are executed at the same time. It means – in one cycle, from left to right. The transition condition that proceeds the concurrency to completion is checked only if the last increment sizes are active in each simultaneous branch. 1 2 3 4 59

  32. ALTERNATIVE BRANCHES Every alternative branch starts and finishes with its own transition condition. The alternative conditions check is executed from left to right. a b c 1 2 3 d e f 4 60

  33. ARITHMETIC STATEMENTS statement symbol action Parameter types ADD + Addition ANY_NUM, TIME SUB – Subtraction ANY_NUM, TIME MUL * Multiplication ANY_NUM, TIME DIV / Division ANY_NUM, TIME MOD MOD Residue ANY_INT IN1 ANY_NUM, ЕХРТ ЕХРТ Exponentiation IN2 ANY_INT MOVE := Assignment ANY 61

  34. BIT SHIFTING STATEMENTS statement action Bit shifting of IN operand to the left by N bits, with zero SHL extension to the right Bit shifting of IN operand to the right by N bits, with zero SHR extension to the left End-around shifting of IN operand to the right by N bits, high ROR bits are replaced by low bits End-around shifting of IN operand to the left by N bits, low ROL bits are replaced by high bits 62

  35. LOGICAL BIT STATEMENT statement action AND Bitwise AND OR Bitwise OR XOR Bitwise exclusive OR NOT Bitwise NOT 63

  36. SWITCH AND DELIMITER STATEMENTS Text format Action Parameter types Binary choice: OUT = IN0 when G = FALSE IN0, IN1: ANY, OUT:= SEL(G, IN0, IN1) OUT = IN1 when G = TRUE G: BOOL OUT:= MAX(INO, INI) The highest value ANY OUT:= MIN(INO, INI) The lowest value ANY OUT:= LIMIT(Min, IN, Max) Sentinel: OUT = MIN(MAX(IN,Min),Max) ANY OUT:= MUX(K, IN 0 ,..,IN (K-1) ) Multiplexer: IN: ANY OUT = IN K K: ANY_INT 64

  37. COMPARATIVE OPERATORS operator symbol action above GT > above or equal GE >= equal EQ = less than or equal LE <= less than LT < non-equal NE <> 65

  38. MATH FUNCTIONS statement action parameter type ABS Absolute value of a number ANY_NUM SQRT Square root of a number ANYREAL LN Natural logarithm of a ANYREAL number LOG Decimal logarithm of a ANYREAL number EXP Exponential ANYREAL SIN Sine ANYREAL COS Cosine ANYREAL TAN Tangent ANYREAL ASIN Arcsine ANYREAL ACOS Anticosine ANYREAL ATAN Arctangent ANYREAL 66

  39. STRING FUNCTIONS INT:= LEN(STR) return the string length STR:= LEFT(STRING STR, INT SIZE) return the STR left part in SIZE STR:= RIGHT(STRING STR, INT SIZE) return the STR right part in SIZE STR:= DELETE(STRING STR,INT LEN,INT POS) return STR, deleting LEN symbols from POS position STR := MID(STRING STR, INT LEN, INT POS) return STR part from POS with the length LEN STR: = CONCAT(STRING STR1, STRING STR2) return STR strung concatenation:= STR1 + STR2 STR: = INSERT(STRING STR1, STRING STR2, INT POS) return STR1 with the attached STR2 in POS position STR: = REPLACE(STR1, STRING STR2, INT LEN, INT POS) return STR1, replacing LEN symbols, from POS position to STR2 INT: = FIND(STRING STR1, STRING STR2) return STR2 position in STR1 string. If STR2 is not found, return 0 67

  40. TIMER CHIPS PLC timer chips differ from timer chips that are applied in general purpose languages. In computer programming languages there are the delay functions that lead to program execution suspension at a time target. In IEC standard there is no timer chip that is able to suspend the PLC performance. Imagine that some signal arrives at a controller input. The same signal arrives at the second input but via a delay hardware module. The standard timer chips work that way. The time delay influences only the output signals shaping and does not provoke any program slow-up. 68

  41. TP TIMER CHIP TP IN BOOL BOOL Q IN PT TIME TIME ET t Q t ET PT t 69

  42. TOF TIMER CHIP TOF IN BOOL BOOL Q PT TIME TIME ET IN t Q t ET PT t 70

  43. TON TIMER CHIP TON IN BOOL BOOL Q PT TIME TIME ET IN t Q t ET PT t 71

  44. REAL-TIME CLOCK RTC EN BOOL BOOL Q PDT D_A_T D_A_T CDT When a block instance is developed, EN input is equal to FALSE, Q output is equal to FALSE, and CDT output is equal to DT#1970-01-01-00-00:00:00. The PDT start time is downloaded over the EN leading edge and the sampling starts. While the clock works, the output Q = TRUE. If EN becomes FALSE, CDT will take the starting value. 72

  45. FLIP FLOPS The SR and RS flip flops performance can be easily understood in equivalent to electric devices. For instance, an electrical starter. To switch it is necessary to have two buttons “START” and “STOP” . These buttons do not have any mechanical fixing, the switching is executed by the button short push. The starting switch sets its condition. 73

  46. SR MAKING DOMINANT FLIP FLOP SR SET BOOL BOOL Q RESET BOOL SET t RESET t Q t 74

  47. RS RESETTING DOMINANT FLIP FLOP RS SET BOOL BOOL Q RESET BOOL SET t RESET t Q t 75

  48. LEADING EDGE DETECTOR R_TRIG CLK BOOL BOOL Q CLK t Q t 76

  49. BACK EDGE DETECTOR F_TRIG CLK BOOL BOOL Q CLK t Q t 77

  50. CTU INCREMENTER CTU CU BOOL BOOL Q RESET BOOL PV WORD WORD CV For every edge the CU increment value (CV output) is increased by 1 at the input. Q output is set in TRUE when the increment reaches or exceeds the PV preset threshold. The logical unit shuts the calculation and zeroes the increment (CV:=0) at the reset input (RESET = TRUE). 78

  51. CTD DECREMENTER CTD CD BOOL BOOL Q LOAD BOOL PV WORD WORD CV For every edge the CD decrement (CV output) is decreased by 1 at the output. Q output is set in TRUE when the decrement reaches the zero point. The CV decrementer is loaded with the starting value that is equal to PV at the input LOAD = TRUE. 79

  52. CTUD INCREMENTER / DECREMENTER CTUD CU BOOL BOOL QU CD BOOL BOOL QD RESET BOOL LOAD BOOL PV WORD WORD CV When the input value is RESET = TRUE, the CV incrementer/decrementer is reset to zero. When the input value is LOAD = TRUE, the CV incrementer/ decrementer is loaded with the value equal to PV. At the edge of CU input the incrementer/ decrementer is increased by 1. At the edge of CD input the incrementer/ decrementer is decreased by 1 (up to zero). The QU output is equal to TRUE, if CV >= PV, or FALSE. The QD output is equal to TRUE, if CV = 0, or FALSE. 80

  53. INTEGRALS BITWISE ACCESS • EXTRACT function of BOOL type has 2 parameters: DWORD X и BYTE N. It returns TRUE if N bit in X numeral is equal to 1, if not – FALSE. The bit numbering starts with 0. • The function of DWORD type has 2 parameters: DWORD X, BYTE N and BOOL В . This function returns X with bit N set in 1 if B equals TRUE. Otherwise, the set bit takes the value of 0. • The blockage of eight logical variables in one byte. The PACK function gets eight parameters В 0, В 1,.. В 7 of BOOL type. The returned value of BYTE type contains bitwise packed values of input parameters. • Byte deblocking in eight logical variables. UNPACK function block has one input of BYTE type and eight outputs of BOOL type that execute the reactive deblocking towards PACK. 81

  54. HYSTERESIS HYSTERESIS IN INT BOOL OUT HIGH INT LOW INT IN HIGH LOW t OUT t 82

  55. LIMIT ALARM LIMITALARM IN INT BOOL O HIGH INT BOOL U LOW INT BOOL IL IN HIGH LOW t O t U t IL t 83

  56. SIGNAL UPDATE RATE LIMIT RAMP IN INT, REAL INT, REAL OUT ASCEND INT, REAL DESCEND INT, REAL TIMEBASE TIME RESET BOOL The function block RAMP limits the signal update rate. If a new input value increased less than by ASCEND in comparison with the previous one or decreased within DESCEND, the signal is transmitted without obstacles to the output. If the signal increase or decrease are too fast, its update is limited. TIMEBASE sets the time over which the limit is determined. An immediate output change is calculated the way that the preset amount does not exceed the set limits. If TIMEBASE equals t#0s, one instance fetch cycle of a function block is used as an amount. 84

  57. DEPENDENCY INTERPOLATION CHARCURVE IN INT INT OUT N BYTE BYTE ERR P ARRAY CHARCURVE function block executes the straight-line dependency interpolation that is set by an anchor point value vector. An interpolation means dependency value calculation that is set by anchor points between these points. 85

  58. DERIVATIVE DERIVATIVE IN REAL REAL OUT TM DWORD RESET BOOL y 1 y 0 y 2 y 3 T 2 T 1 T 0 86

  59. INTEGRATION INTEGRATION IN REAL REAL OUT TM DWORD BOOL OVERFLOW RESET BOOL The output Out gives an integral value. The Overflow (Bool) output signals about an overload of the Out variable highest value of Real type. Before the calculations it is necessary to reset. Then, the set integration interval is divided into several small parts. The integral value is calculated by means of cyclic summation. At every function block instance call, it gets a new IN value at the input and a corresponding time increment (TM). The integral is calculated approximately by a rectangle method. The integral value is approximately equal to the rectangle square sum. The reset is done by setting the RESET input value at TRUE, it causes the Сброс выполняется установкой значения входа RESET в TRUE, он вызывает обнуление суммы и снимает признак переполнения . 87

  60. PID CONTROLLER where Y 0 – value at zero error (starting value), K p – proportional gain, T n – integration constant, T υ – derivative action time. 88

  61. PID CONTROLLER Input Data type Description ACTUAL REAL feedback signal SET_POINT REAL specification КР REAL transmission coefficient TN DWORD integration constant (msec) TV DWORD derivative action time (msec) Y_MANUAL REAL manual specification Y_OFFSET REAL steady-state value Y_MIN REAL minimum valid value Y_MAX REAL maximum valid value MANUAL BOOL manual feed RESET BOOL reset action 89

  62. PID CONTROLLER Output Data type Description Y REAL control action LIMITS_ACTIVE BOOL threshold value achieving flag OVERFLOW BOOL overflow error flag 90

  63. CONTROLLER PARAMETERIZATION • Ziegler- Nichols method • Shubladze method • Kuhn method • Schedel method 91

  64. ZIEGLER – NICHOLS METHOD 1. Logout of PID-controller integral and derivative components. 2. Increase of k п with a specification concurrent step-wise signaling up to continuous waves occurrence with period T кр in system. 3. PID-controller parameter determination by the following formula: 92

  65. SHUBLADZE METHOD • Proportional adjustment coefficient is determined by the following formulae: • Integrated adjustment coefficient is determined by the following formulae: • Differential adjustment coefficient is determined by the following formulae: 93

  66. KUHN METHOD • The setting determination is done by a total time constant           T T T .. T T T .. T T 1 2 n d 1 d 2 d m t • The point definition with coordinates ( t 1 , h 1 ) and ( t 2 , h 2 ) on the transient behavior curve. The calculation of values T 1 and T t :  t t h     2 1 i T , T T ln(1 ) t ,  1 t 1 i k h k s 1 ln s  k h s 2 • The calculation of a total time constant:    T T T . 1 t • The calculation of PID-controller fudge factors: 94

  67. SCHEDEL METHOD • PID-controller coefficients are set the way that the system damping coefficients are: 2,     0,5 0 1 3 • The controlled object is approximated by the following transfer function: k  W s ( )    3 3 2 2 T s T s T s 1 3 2 1 • PID-controller parameters are calculated by the following formula: 95

  68. HIGHS AND LOWS • The method choice should be based on control object characteristics and requirements to the synthetic system • To provide a higher system performance it is better to use Ziegler-Nichols or Schedel adjustment methods • For processes without an overshoot it is more efficient to use the PID- controllers set by Kuhn and Shubladze methods • The common disadvantage of existing methods is control objects approximation by models that contain neither zeros nor lag elements • The lack of connection between controller fudge factors and system quality direct indices 96

  69. USER INTERFACE The interface between a human and a system is called a human- computer interface (HCI). When a human-computer interface is designed for human interaction with a computer-aided processing procedure, it is called SCADA. This term is literally translated as “supervisory control and data acquisition”, but in practice it is interpreted much wider, and the modern SCADA bursts include a wide range of functionalities that is wider than a supervisory control and data acquisition. 97

  70. SCADA FUNCTIONS • SCADA adjustment to a definite task (i.e. automation system software component development) • Dispatch control • Automatic control • Workflow history holding • Safety function execution • Systemic function execution 98

  71. ALARMS accident attention blind norm spot attention accident 99

  72. INTERFACE DEVELOPMENT • Development of a graphic interface (mnemonic diagrams, charts, tables, popup windows, command entry elements and etc.) • Programming and automation system operating procedure debugging. Many SCADAs allow to perform the system debugging in equipment compatibility mode as well as with connected equipment • An intercommunicating system adjustment (networks, modems, communication controllers and etc.); data bases development and SCADA connection 100

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