Sequential circuits Analysis Design March 16, 2020 Patrice - - PowerPoint PPT Presentation

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Sequential circuits Analysis Design March 16, 2020 Patrice - - PowerPoint PPT Presentation

Sequential circuits Analysis Design March 16, 2020 Patrice Belleville / Geoffrey Tien 1 Announcements Classes moved online due to COVID-19 precautions Midterm 2 will take place ONLINE tomorrow at the scheduled time Instructions


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SLIDE 1

Sequential circuits

Analysis Design

March 16, 2020 Patrice Belleville / Geoffrey Tien 1

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SLIDE 2

Announcements

  • Classes moved online due to COVID-19 precautions
  • Midterm 2 will take place ONLINE tomorrow at the scheduled

time

– Instructions for access, guidelines, and submission will be announced

  • n Piazza
  • Please pause the recorded video if you need to write anything
  • r we have an exercise
  • Please bear with the poor lighting and recording quality – this

will hopefully improve after I purchase some new equipment

March 16, 2020 Patrice Belleville / Geoffrey Tien 2

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SLIDE 3

Exercise

  • Determine the behaviour of the following sequential system:

March 16, 2020 Patrice Belleville / Geoffrey Tien 3

Sequential circuit analysis

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SLIDE 4

Sequential circuits

Design

March 16, 2020 Patrice Belleville / Geoffrey Tien 4

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SLIDE 5

Sequential circuit design

  • All of the same techniques of design and analysis from

combinational circuits also apply to sequential design

– Karnaugh maps, recognizers, etc. – Now, the system state (flip-flop outputs) are included as "inputs"

  • We start with a specification of the states, transitions, inputs,

and sequential devices to be used in the construction

– based on the understood behaviour of the sequential device (e.g. D flip- flop or register), and the required transition, determine the inputs necessary to cause the required transition to occur

March 16, 2020 Patrice Belleville / Geoffrey Tien 5

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SLIDE 6

Sequential circuit design

  • Example: design a sequential system with two bits of state and

two external inputs, 𝑔𝑥 and 𝑐𝑥, with the following behaviour:

– do nothing when 𝑔𝑥 = 0 and 𝑐𝑥 = 0 – Reset state to 0 when 𝑔𝑥 = 1 and 𝑐𝑥 = 1 – Advance forward through the sequence … , 2,1,3,0,2,1, … when 𝑔𝑥 = 1 and 𝑐𝑥 = 0 – Advance backward through the sequence … , 2,1,3,0,2,1, … when 𝑔𝑥 = 0 and 𝑐𝑥 = 1

  • In other words, advance through the sequence … 0,3,1,2,0,3, …

– A sequence generator with reset

March 16, 2020 Patrice Belleville / Geoffrey Tien 6

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SLIDE 7

Sequential circuit design

  • Approach 1: individual bits of state implemented using D flip-

flops

– Construct a truth table

  • current state and external inputs as "input"
  • next state as "output"
  • determine propositional logic statements/functions to produce the

necessary transition from each current state to the next state.

March 16, 2020 Patrice Belleville / Geoffrey Tien 7

Sequence generator with reset

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SLIDE 8

Sequential circuit design

March 16, 2020 Patrice Belleville / Geoffrey Tien 8

Sequence generator with reset – approach 1

𝑹𝟐 𝑹𝟏 𝒈𝒙 𝒄𝒙 𝑹𝟐

+

𝑹𝟏

+

𝒆𝟐 𝒆𝟏 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

The 𝑒 columns will be the same as the 𝑅+ columns Sequence: 2, 1, 3, 0… 𝑔𝑥 ∙ 𝑐𝑥 = 00: no chg 𝑔𝑥 ∙ 𝑐𝑥 = 11: reset

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SLIDE 9

Sequential circuit design

March 16, 2020 Patrice Belleville / Geoffrey Tien 9

Sequence generator with reset – approach 1

All signals are 1 bit wide

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SLIDE 10

Sequential circuit design

  • Approach 2: Load a register with values from a semantic

analysis

– Not applicable to this problem

  • Study the required behaviours, and use combinational

components (possibly with feedback loops) to achieve individual functions

– E.g. use full adders for addition/increment, use subtractors for subtraction/decrement, etc.

  • Select between the individual functions using multiplexer(s)

March 16, 2020 Patrice Belleville / Geoffrey Tien 10

Sequence generator with reset – approach 2

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SLIDE 11

Sequential circuit design

  • Approach 3: Load a register with constant values selected by a

multiplexer

– Arrange the multiplexer’s select bits in the same order as the state/input columns in the truth table – Supply constant values to multiplexer’s data inputs according to 𝑒 inputs of each row

March 16, 2020 Patrice Belleville / Geoffrey Tien 11

Sequence generator with reset – approach 3

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SLIDE 12

Sequential circuit design

March 16, 2020 Patrice Belleville / Geoffrey Tien 12

Sequence generator with reset – approach 3

Data signals are 2 bits wide

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SLIDE 13

Sequential circuit design

  • How to make random practice problems

– Decide how many state/input bits you want – From a DFA-like state transition diagram, randomly draw some transitions to various states on specified inputs – Create a truth table from your state transition diagram

  • There may be some unspecified rows – this is generally OK just for

practice and become “don’t-care” rows in your design – see Geoff’s

  • ptional Karnaugh map slides from January (between slide sets 05 and 06)

March 16, 2020 Patrice Belleville / Geoffrey Tien 13

Practice