Second year review WP3 overview HW/SW-based methods
Trento – October 17th, 2008
Second year review WP3 overview HW/SW-based methods Trento - - PowerPoint PPT Presentation
Second year review WP3 overview HW/SW-based methods Trento October 17th, 2008 Goal Investigate the combination of hardware- and software based software protection techniques in order to implement the remote entrusting principle 2
Trento – October 17th, 2008
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Team:
Bart PRENEEL
Jan CAPPAERT
Sebastian FAUST
Thomas HERLEA
Dries SCHELLEKENS
Brecht WYSEUR
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Team:
Jean-Daniel AUSSEL
Jerome D’ANNOVILLE
Christian Cudonnec
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Team:
Paolo TONELLA
Mariano CECCATO
Jasvir NAGRA
Milla DALLA PREDA
Amitabh SAXENA
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Team:
Stefano DI CARLO
Alberto SCIONTI
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Team:
Igor KOTENKO
Vasily DESNITSKY
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M0 M3 M6 M9 M12 M15 M18 M21 M24 M27 M30 M33 M36
T3.1 T3.1 T3.2 T3.2 T3.3 T3.3 T3.4 T3.4 T3.5 T3.5
D3.2
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M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22 M23 M24 M25 M26
T3.1 T3.1
T3.3 T3.3 T3.4 T3.4 T3.2 T3.2 T3.5 T3.5
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Use of light-weight hardware to ensure software confidentiality and software integrity
Developments
T3.2 T3.2
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T3.2 Hardware/Software Co-Obfuscation
Trusted computing approach: remote attestation
T3.2 T3.2
CRTM BIOS OS loader OS Application Option ROMs TPM Hardware Network New OS Component root of trust in integrity measurem ent root of trust in integrity reporting measuri ng reporting storing values logging methods Memory trusted component
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T3.2 Hardware/Software Co-Obfuscation
Disadvantages of timing based attestation techniques
mode)
hardware → replacement attack
proxy → attacks Minimal trade-off: assist software attestation with TPM features.
T3.2 T3.2
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T3.2 Hardware/Software Co-Obfuscation
T3.2 T3.2
n
Untrusted Untrusted platform platform Trusted platform Trusted platform P P M M
t2 – t1 < Δtexpected
P P M M
c := cksum(TS1,M) h := hash(TS2,P) c := cksum(TS1,M) h := hash(TS2,P) h TS1 := SignTPM(n||t1) TS2 := SignTPM(c||t2) TS1 TS2
TPM TPM
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T3.2 Hardware/Software Co-Obfuscation
Extensions: assistance for trusted OS loader
Publication
Attestation on Legacy Operating Systems with Trusted Platform Modules”, In 1st International Workshop on Run Time Enforcement for Mobile and Distributed Systems (REM 2007)
Attestation on Legacy Operating Systems with Trusted Platform Modules”, Special Issue on Science of Computer Programming, 2008
T3.2 T3.2
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T3.2 Hardware/Software Co-Obfuscation
(POLITO)
APPLICATION uses available services exported by the DRIVER
communication between the application server and the authentication hardware
MONITOR manages the application code hashing and encrypting operations T3.2 T3.2
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T3.2 Hardware/Software Co-Obfuscation
(POLITO) 1.
At startup of the client application, a session key is established, using a key agreement protocol between the application server and the client machine. Optionally, the session key can be updated during the execution of the program.
2.
The session key is used to computed a signature of the client application.
3.
The server periodically sends to the hardware monitor an Authentication Request, and waits for the computed signature
4.
The client receives the requests (on a socket interface implemented in the driver module) and forwards it to the hardware monitor
5.
The hardware monitor computes the hash of the memory pages’ content related to the client application (code segment) directly accessing the computer’s memory and without relying on any system call. The only used information is the name of the target application used to determine the position of the application in memory
6.
The hardware module computes the signature for the considered memory pages using the session key, and sends it to the server via the driver’s socket
7.
The server compares the two signatures and determines whether it can already deliver the service to the client or not
T3.2 T3.2
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T3.2 Hardware/Software Co-Obfuscation
(POLITO)
T3.2 T3.2
Client
FPGA
Application Server
mem
session key agreement request signsk(mem) service hash
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T3.2 Hardware/Software Co-Obfuscation
(UNITN)
T3.2 T3.2
Un-trusted host
Trusted host
Program P
Card Reader Virtual secure channel
Networ k
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T3.2 Hardware/Software Co-Obfuscation
(UNITN)
T3.2 T3.2
Smart card Un-trusted host:
actual value from the card
statements Smart card:
from the host
Un-trusted host
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T3.2 Hardware/Software Co-Obfuscation
(UNITN)
T3.2 T3.2
Original client Barrier slice 858 120 14%
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T3.2 Hardware/Software Co-Obfuscation
(UNITN)
part of the application
verify the client healthy execution
15% memory 25% threads 8% network
(14% of the application)
Mariano Ceccato, Jasvir Nagra, Paolo Tonella, “Distributed Trust Verification to Increase Application Performance”, In 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing, 2008
T3.2 T3.2
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M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22 M23 M24 M25 M26
T3.1 T3.1
T3.3 T3.3 T3.4 T3.4 T3.2 T3.2 T3.5 T3.5
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T3.3 – Encrypted Code
Encryption Schemes”, COSIC internal report, 15 pages, 2007 Deliverable 3.3 (M30)
T3.3 T3.3
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T3.3 Encrypted code execution
(GEMALTO)
Study the opportunity to use a new hardware as a candidate platform for the project/task
USB Dongle: Smartcard + flash memory
T3.3
Dongle
T3.3 T3.3
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T3.3 Encrypted code execution Secure with hardware
(GEMALTO)
T3.3 T3.3
USB Connector Controller Flash Memory SIM card
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T3.3 Encrypted code execution Secure with hardware
(GEMALTO)
Smart Card + Flash memory
T3.3 T3.3
CTRL
ISO 7816
UICC
CDROM Private Partition
Smart Card Controlle r Flash Memory
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T3.3 Encrypted code execution Secure with hardware
(GEMALTO)
tampering
application
T3.3 T3.3
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Untrusted computer
T3.3 T3.3
Service: Data Access Cryptography Property Analyzer Smartcard Application maintenance
Trusted Application
Keys Memory Thumbprints Monitor Server Log service Report, update propertie s Provide
shutdown service Releases Mgt
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Untrusted Computer Smart Card
Trusted Application Monitor Properties Analyzer Report Properties Update Properties
Keys Memory thumbprints
Provide or shutdown service Service: Data Access Cryptography
T3.3 Encrypted code execution Secure with hardware
(GEMALTO)
T3.3 T3.3
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T3.3 Encrypted code execution Secure with hardware
(GEMALTO)
T3.3 T3.3
the thumbprint mechanism
could theoretically always be retrieved
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M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22 M23 M24 M25 M26
T3.1 T3.1
T3.3 T3.3 T3.4 T3.4 T3.2 T3.2 T3.5 T3.5
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information (side-channel attacks)
T3.4 T3.4
qi ri
leakage
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T3.4 Observable Cryptography
Promising model Based on reduction proofs
Our work
security proofs)
notions
T3.4 T3.4
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T3.4 Observable Cryptography
Scheme Assumption RSA-CPA (which is IND-CPA) RSA one-way assumption RSA-OAEP (which is IND-CCA) Unforgeability assumption RSA-FDH Strong unforgeability assumption
T3.4 T3.4
Study of practical constructions
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T3.4 Observable Cryptography
Good news
constructions in the PO model Bad news
to be introduced
problem and do not reflect practice
that allows to build lots of constructions Further work
likely; will face similar problems)
T3.4 T3.4
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T3.4 Observable Cryptography
Model
information no additional information obtained Provably Secure Implementations presented
Details on Micali / Reyzin and Ishai model research will be delivered in extensive report in Y3.
T3.4 T3.4
Conclusion: probing model is unrealistic. In practice, a more serious threat is power analysis, where the adversary
depend on all shares ==> no provable security can be achieved
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M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22 M23 M24 M25 M26
T3.1 T3.1
T3.3 T3.3 T3.4 T3.4 T3.2 T3.2 T3.5 T3.5
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T3.5 – report on combination of different approaches
the different techniques developed and analyzed in WP2 and WP3 to one overall approach.
T3.5 T3.5
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T3.5 – scalability and performance
(SPIIRAS)
T3.5 T3.5
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T3.5 – scalability and performance
(SPIIRAS)
T3.5 T3.5
Application SW, SW/HW based TR techniques and methods Application characteristic Hardware in use Techniques characteristic
System designer take into account take into account
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T3.5 – scalability and performance
(SPIIRAS)
SW/HW based TR techniques and dynamic replacement principle
interacts with a great deal of clients)
T3.5 T3.5
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T3.5 – scalability and performance
(SPIIRAS)
performance to the utmost:
computations (both on client and server). E.g.: barrier slicing, data encoding/decoding, etc.
barrier slicing could require a lot of data passes, and so great network resources
down the client performance. E.g. smartcards, etc.
T3.5 T3.5
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T3.5 – scalability and performance
(SPIIRAS)
T3.5 T3.5
Original Re-Trust objective:
determines
security replacement (Replacement period is determined from the security quality)
For T3.5 we suggest two objectives:
determine
security replacement & (To determine minimal necessary Hardware capable
Hardware (Having some specific Hardware to determine the security level which could be reasonable to provide)
determines
security replacement & Hardware
(*) (**) (***)
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T3.5 – scalability and performance
(SPIIRAS)
the performance:
use and theirs robustness increase then the value of acceptable replacement period also increases.
can increase, however the network hardware could remain the same
T3.5 T3.5
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T3.5 – scalability and performance
for RE-TRUST mechanism to be applied in practice
unique clients are connected with the same server the system designer should choose TR techniques free of any serious server based computations only
certainly has constrained amount of clients (e.g.: application working within the limits of an enterprise network)
T3.5 T3.5
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T3.5
The task investigates the possibilities to combine the different TR techniques developed and analyzed in WP2 and WP3 to one
techniques representing the “security/performance” tradeoff for the concrete real application
Application SW, SW/HW based TR techniques and methods Application characteristic HW / OS in use Techniques characteristic
System designer take into account take into account
T3.5 T3.5
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T3.5
Specific security level
Overall performance consists of
Activities influencing upon the overall performance to the utmost:
encoding/decoding, etc.
network resources
determine
security replacement
&
To determine minimal necessary HW/OS capable of meeting The given security and replacement qualities
HW/OS
Having some specific HW/OS to determine the security level which could be reasonable to provide
determine
security replacement
&
HW/OS Two objectives:
T3.5 T3.5
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Platform (smart card, and FPGA) (T3.2)
Computing with Encrypted Data (T3.3)
Cryptography (T3.4)
possibilities of their combination (T3.5)
WP3 WP3