RISC-V: Emulation and Rich, Non-Intrusive Analytics Address Verification Complexity Embedded World | 27 Feb 2018
UltraSoC: Corporate Overview Tier-1 • VC-funded start-up Automotive • Recently completed round D ($6M) ARMv8 • Founded 2009 Server • Headquarters in Cambridge UK • 44 patents • New Chairman October 2017 • Alberto Sangiovanni-Vincentelli • Industry leaders adopting UltraSoC • Silicon-proven with multiple customers Embedded World 2018 Commercial in Confidence 2
Mentor Graphics: Corporate Overview • Founded in 1982 to deliver electronic design automation solutions • Acquired by Siemens in March 2017 • Mentor has the broadest industry portfolio of best-in-class products • For IC, FPGA, boards, wire harness, and systems • The only EDA company with embedded software products • Helps engineers conquer design challenges in the increasingly complex worlds of board and chip design Embedded World 2018 Commercial in Confidence 3
The SoC productivity gap 1 Systemic Complexity & Increasing Cost • SoC with multi-processors, video and graphic IP • Heterogeneous multi-core; HW+SW co-integration • Simulation tools struggle with capacity and debug • Some problems only seen in real silicon • Post-silicon: difficult to monitor large SoCs Smartphone (courtesy VIA, Inc.) • Design cost increasing at +43.7% CAGR Number of transistors in CPU Start of Moore’s Law • IP integration cost increasing +77.2% CAGR Methodology • UltraSoC gives insight to fix these issues Development Methodology Evolution Embedded World 2018 Commercial in Confidence 4
The SoC productivity gap 2 Cost of failure is higher than ever Costs are growing rapidly Producing a complex SoC • SoC design cycles lengthening and costs growing 329 typically costs $170m+…. SoC Design Cost ($m) 227 • Debugging problematic silicon is expensive ….or $12m per month, 173 time is valuable! 129 • Optimization is hard (especially HW+SW) 91 61 42 26 12 4 • Lost Product Sales from late Time-In-Market m m m m m m m m m m n n n n n n n n n n 0 0 0 5 0 8 0 4 0 7 9 6 1 8 3 4 2 2 1 1 1 / / / / 5 2 2 6 4 3 2 1 • Lost Product Sales due to Reduced Time-In-Market • ”First to market makes 3x lifetime profit” – PRTM • Spend a few thousand gates to save months in TTM and $M in development Embedded World 2018 Commercial in Confidence 5
Classical “Processor Centric” View Validation System System Requirements Acceptance Validation Sub-System Sub-System Design Integration D e v e Validation g HW/SW Block Module l o n p i Design Integration t m s e e T n t HW/SW Implementation Simulation/Prototyping/ Emulation based debug 6 Embedded World 2018 Commercial in Confidence 6
Pre-silicon today (1) Tools exist for debugging & analysis in Analysis virtual world BUT - Many cannot support HW+SW - Simulation cannot detect subtle, -ization Visual system-wide bugs - Emulation powerful & far faster Data Simulation Emulation Prototype Lab test Field trial In Life Tape-out GA Embedded World 2018 Commercial in Confidence 7
Pre-silicon with Mentor Graphics Analysis -ization Visual Expands & completes pre-silicon with very powerful tools that understand HW + SW Data Simulation Emulation Prototype Lab test Field trial In Life Tape-out GA Embedded World 2018 Commercial in Confidence 8
Digital Circuit Verification / Validation Challenge • A large digital integrated circuit can contain 1 billion gates or more • A task like booting the Android OS takes billions of cycles • Modeling large integrated circuits for the workloads required for verification takes more computing than can be accomplished on CPU farms with 1000s of CPUs for many years • Emulation is a key technology to address this challenge Embedded World 2018 Commercial in Confidence 9
What is an Emulator? § An emulator is special purpose hardware for modeling digital integrated circuits § Emulators typically run 1,000 to 10,000 times faster than a SW simulator § It contains programmable logic elements and programmable interconnects used to implement the circuit being verified § It has trace logic that can record the state of the entire circuit for later analysis § The state of the circuit being verified can be saved and restored § Veloce Strato supports designs up to 15 billion gates and up to 64 concurrent users Embedded World 2018 Commercial in Confidence 10
Power Analysis on Veloce Identification of Power peaks Large peaks (~1us) -> e.g. Supply integrity Narrow peaks (~1ns) -> e.g. IR-Drop Verification of Power Domains Signoff Usage via UPF Power Plot Close Correlation ON OFF ON OFF ON OFF Should be OFF Veloce Activity Plot Power Surges Identification Electro-migration dI/dt voltage drop High power on very long periods Power Trends Compare activity plots across RTL drops Hot Spots Identification Optimization targets, Local IR-Drop,… Embedded World 2018 Commercial in Confidence 11
Veloce Deterministic ICE App • Emulator is connected to external devices K e y b M o a • Must interact with real devices in real-time o r d u s & e I n p u t • Cannot be slowed or stopped to perform, tracing I/O Devices debug or analysis SoC SoC Network Input • Input (stimulus) from real devices are recorded Design Design • After run is complete, design is “replayed” a d e R k D i s with recorded stimulus CPU Timer Events • During this run, tracing, debug, and analysis can be performed • Design can be saved and restored • Allows deep analysis of designs with “hardware in the loop” including power analysis and full waveform views Embedded World 2018 Commercial in Confidence 12
Visualizer Debug Environment • Common waveform and analysis platform for all Mentor’s design tools • Enables data collected from logic simulation, emulation, FPGA prototyping, and virtual prototyping to be combined and correlated • Easy to use • Powerful analysis capabilities • High capacity • Handles full design traces of billion gate designs over millions of clock cycles Embedded World 2018 Commercial in Confidence 13
Marching Waveforms • Marching waveforms allow users to view design traces as they are collected on the emulator • Waveforms are uploaded periodically • Every second or 1 million clocks, which ever occurs first\ Enables interactive debug of designs on • Veloce Embedded World 2018 Commercial in Confidence 14
Powerful, Easy Searching and Filtering • Search and Filter in any window to find objects • Advanced search adds color tags to a search highlighting key traces Embedded World 2018 Commercial in Confidence 15
TimeCone - Find Root Cause of an Event or X Trace values back in time through combinational AND sequential elements to find root cause Embedded World 2018 Commercial in Confidence 16
FSM Debug • View complete FSM state transitions diagram and table Previous State Active State Inactive State Embedded World 2018 Commercial in Confidence 17
Post-silicon today Post-silicon tools do exist Analysis BUT: - Are inconsistent - Operate in silos; usually processor-centric - Have gaps; not across whole of SoC -ization Visual - Usually cannot be used in-field or in-life - Not compatible with pre-silicon Inconsistent Gap Data Simulation Emulation Prototype Lab test Field trial In Life Tape-out GA Embedded World 2018 Commercial in Confidence 18
Post-silicon with UltraSoC Analysis Complete post-silicon product Integrated, coherent view across whole SoC § § In-lab, field trial & in-life -ization Visual § ”Smart” data gathering Synchronized HW, SW debug; multi-vendor § BUT Limited analytics, visualization § § Not integrated with standard pre-silicon Data tools Simulation Emulation Prototype Lab test Field trial In Life Tape-out GA Embedded World 2018 Commercial in Confidence 19
UltraSoC: on-chip Analytics for SoC as a Whole • A coherent architecture to debug, develop, optimize and secure • Full SoC visibility, HW & SW • Support all architectures: Freedom of IP selection • Real-time & non-intrusive • Advanced analytics & forensics • Power/Performance optimization • “in life” analytics & SLA compliance • Supports Functional Safety • Supports Bare Metal Security™ • High-speed debug: USB or SerDes Embedded World 2018 Commercial in Confidence 20
Actionable Insights across the Whole SoC UltraSoC delivers actionable insights Knowledge With system-wide Value understanding Information From rich data across the whole SoC Data UltraSoC enables full visibility of SoC Embedded World 2018 Commercial in Confidence 21
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