Real-Time Scheduling Single Processor Chenyang Lu Critiques 1/2 - - PowerPoint PPT Presentation

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Real-Time Scheduling Single Processor Chenyang Lu Critiques 1/2 - - PowerPoint PPT Presentation

Real-Time Scheduling Single Processor Chenyang Lu Critiques 1/2 page critiques of research papers. q Back-of-envelop comments - NOT whole essays. q Guidelines: http://www.cs.wustl.edu/%7Elu/cse521s/critique.html Critique #1 q Email to


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SLIDE 1

Real-Time Scheduling

Single Processor Chenyang Lu

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SLIDE 2

Critiques

Ø 1/2 page critiques of research papers.

q Back-of-envelop comments - NOT whole essays. q Guidelines: http://www.cs.wustl.edu/%7Elu/cse521s/critique.html

Ø Critique #1

q Email to Jiangnan by 10am, 2/18 - hard deadline! q The Design and Performance of a Real-time CORBA Event Service

2

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SLIDE 3

Readings

Ø Single-Processor Scheduling

q Hard Real-Time Computing Systems, by G. Buttazzo.

  • Chapter 4 Periodic Task Scheduling
  • Chapter 5 (5.1-5.4) Fixed Priority Servers
  • Chapter 7 (7.1-7.3) Resource Access Protocols

Ø Further references

q A Practitioner's Handbook for Real-Time Analysis: Guide to Rate Monotonic

Analysis for Real-Time Systems, by Klein et al.

q Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms, by

Stankovic et al.

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SLIDE 4

Real-Time Scheduling

Ø What are the optimal scheduling algorithms? Ø How to assign priorities to tasks? Ø Can a system meet all deadlines?

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SLIDE 5

Benefit of Scheduling Analysis

VEST (UVA) Baseline (Boeing) Design – one processor 40 Design – one processor 25 Implementation – one processor 75 Scheduling analysis - MUF ´ 1 Timing test ´ 30 Design - two processors 25 Design - two processors 90 Implementation – two processors 105 Scheduling analysis - DM/Offset Ö 1 Timing test Ö 20 “Implementation” 105 Total composition time 172 Total composition time 345

  • Schedulability analysis reduces development time by 50%!
  • Reduce wasted implementation/testing rounds
  • Analysis time << testing
  • Quick exploration of design space!
  • More reduction expected for more complex systems

J.A. Stankovic, et al., VEST: An Aspect-Based Composition Tool for Real-Time Systems, RTAS 2003.

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SLIDE 6

Consequence of Deadline Miss

Ø Hard deadline

q System fails if missed. q Goal: guarantee no deadline miss.

Ø Soft deadline

q User may notice, but system does not fail. q Goal: meet most deadlines most of the time.

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SLIDE 7

Ø Since the application interacts with the physical world, its computation must be completed under a time constraint. Ø CPS are built from, and depend upon, the seamless integration

  • f computational algorithms and physical components. [NSF]

Cyber-Physical Systems (CPS)

7

Cyber-Physical Boundary

^ Robert L. and Terry L. Bowen Large Scale Structures Laboratory at Purdue University

Real-Time Hybrid Simulation (RTHS)

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SLIDE 8

Cyber-Physical Systems (CPS)

8

Cyber-Physical Boundary

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SLIDE 9

Interactive Cloud Services (ICS)

Need to respond within100ms for users to find responsive*.

9

Search the web

* Jeff Dean et al. (Google) "The tail at scale." Communications of the ACM 56.2 (2013)

2nd phase ranking Snippet generator doc

  • Doc. index search

Response Query

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SLIDE 10

Interactive Cloud Services (ICS)

Need to respond within100ms for users to find responsive*. E.g., web search, online gaming, stock trading etc.

10

* Jeff Dean et al. (Google) "The tail at scale." Communications of the ACM 56.2 (2013)

Search the web

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SLIDE 11

Comparison

Ø General-purpose systems

q Fairness to all tasks (no starvation) q Optimize throughput q Optimize average performance

Ø Real-time systems

q Meet all deadlines. q Fairness or throughput is not important q Hard real-time: worry about worst case performance

Chenyang Lu 11

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SLIDE 12

Terminology

Ø Task

q Map to a process or thread q May be released multiple times

Ø Job: an instance of a task Ø Periodic task

q Ideal: inter-arrival time = period q General: inter-arrival time >= period

Ø Aperiodic task

q Inter-arrival time does not have a lower bound

Chenyang Lu 12

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SLIDE 13

Timing Parameters

Ø Task Ti

q Period Pi q Worst-case execution time Ci q Relative deadline Di

Ø Job Jik

q Release time: time when a job is ready q Response time Ri = finish time – release time q Absolute deadline = release time + Di

Ø A job misses its deadline if

q Response time Ri > Di q Finish time > absolute deadline

Chenyang Lu 13

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Example

Ø P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang Lu 14

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SLIDE 15

Metrics

Ø A task set is schedulable if all jobs meet their deadlines. Ø Optimal scheduling algorithm

q A task set is unschedulable under the optimal algorithm à

unschedulable under any other algorithms.

Ø Overhead: Time required for scheduling.

Chenyang Lu 15

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SLIDE 16

Optimal Scheduling Algorithms

Ø Rate Monotonic (RM)

q Higher rate (1/period) à Higher priority q Optimal preemptive static priority scheduling algorithm

Ø Earliest Deadline First (EDF)

q Earlier absolute deadline à Higher priority q Optimal preemptive dynamic priority scheduling algorithm

Chenyang Lu 16

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Example

Ø P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang Lu 17

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Assumptions

Ø Single processor. Ø All tasks are periodic. Ø Zero context switch time. Ø Relative deadline = period. Ø No priority inversion. Ø Have been extended to remove these assumptions.

Chenyang Lu 18

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SLIDE 19
  • Utilization of a processor:

– n: number of tasks on the processor.

  • Utilization bound Ub: All tasks are guaranteed to be

schedulable if U ≤ Ub.

  • No scheduling algorithm can schedule a task set if U>1

– Ub ≤ 1 – An algorithm is optimal if its Ub = 1

Schedulable Utilization Bound

1 n i i i

C U P

=

Chenyang Lu 19

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SLIDE 20

RM Utilization Bound

Ø Ub(n) = n(21/n-1)

q n: number of tasks q Ub(2) = 0.828 q Ub(n) ≥ Ub(¥) = ln2 = 0.693

Ø U ≤ Ub(n) is a sufficient condition, but not necessary. Ø Ub = 1 if all task periods are harmonic

q Periods are multiples of each other q e.g., 1,10,100

Chenyang Lu 20

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SLIDE 21

Properties of RM

Ø May not guarantee schedulability when CPU is not fully utilized. Ø Low overhead

q When the task set is fixed, the priority of a task never changes.

Ø Easy to implement on POSIX APIs.

Chenyang Lu 21

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EDF Utilization Bound

Ø Ub = 1 Ø U ≤ 1: sufficient and necessary condition for schedulability. Ø Guarantees schedulability if CPU is not over-utilized. Ø Higher overhead than RM: task priority may change online.

Chenyang Lu 22

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Assumptions

Ø Single processor. Ø All tasks are periodic. Ø Zero context switch time. Ø Relative deadline = period. Ø No priority inversion. Ø What if relative deadline < period?

Chenyang Lu 23

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SLIDE 24

Optimal Scheduling Algorithms

Relative Deadline < Period

Ø Deadline Monotonic (DM)

q Shorter relative deadline à Higher priority q Optimal preemptive static priority scheduling

Ø Earliest Deadline First (EDF)

q Earlier absolute deadline à Higher priority q Optimal preemptive dynamic priority scheduling algorithm

Chenyang Lu 24

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SLIDE 25
  • Sufficient but pessimistic test
  • Sufficient and necessary test: response time analysis

DM Analysis

1/ 1

(2

  • 1)

n n i i i

C n D

=

£

å

Chenyang Lu 25

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SLIDE 26
  • Works for any fixed-priority preemptive scheduling algorithm.
  • Critical instant

– results in a task’s longest response time. – when all higher-priority tasks are released at the same time.

  • Worst-case response time

– Tasks are ordered by priority; T1 has highest priority

Response Time Analysis

1 1 i i i i j j j

R R C C P

  • =

é ù = + ê ú ê ú ê ú

å

Chenyang Lu 26

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SLIDE 27

Tasks are ordered by priority; T1 has the highest priority. for (each task Tj) { I = 0; R = 0; while (I + Cj > R) { R = I + Cj; if (R > Dj) return UNSCHEDULABLE; } } return SCHEDULABLE;

Response Time Analysis

é ù ê ú ê ú

å

j-1 k k=1 k

R I = C ; P

Chenyang Lu 27

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SLIDE 28

Example

Ø P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.

Chenyang Lu 28

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SLIDE 29

EDF: Processor Demand Analysis

i n i i P

C P L L C

å

=

ú û ú ê ë ê =

1

) , (

Chenyang Lu 29

  • To start, assume Di = Pi
  • Processor demand in interval [0, L]: total time needed for

completing all jobs with deadlines no later than L.

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SLIDE 30
  • A set of periodic tasks is schedulable by EDF if and only if

for all L ³ 0:

  • There is enough time to meet processor demand at every

time instant.

Schedulable Condition

å

=

ú û ú ê ë ê ³

n i i i

C P L L

1

Chenyang Lu 30

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SLIDE 31
  • End at the first time instant L when all the released jobs are

completed

  • W(L): Total execution time of all tasks released by L.

Busy Period Bp

} ) ( | min{ ) (

1

L L W L B C P L L W

p i n i i

= = ú ú ù ê ê é =å

=

Chenyang Lu 31

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Properties of Busy Period

Chenyang Lu 32

  • CPU is fully utilized during a busy period.
  • The end of a busy period coincides with the

beginning of an idle time or the release of a periodic job.

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SLIDE 33
  • All tasks are schedulable if and only if

at all job release times before min(Bp, H)

Schedulable Condition

å

=

ú û ú ê ë ê ³

n i i i

C P L L

1

Chenyang Lu 33

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Compute Busy Period

busy_period { H = lcm(P1,…,Pn); /* least common multiple */ L = åCi; L' = W(L); while (L' != L and L' <= H) { L = L'; L' = W(L); } if (L' <= H) Bp = L; else Bp = INFINITY; }

Chenyang Lu 34

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  • A set of periodic tasks with deadlines no more than periods is

schedulable by EDF if and only if where D = {Di,k | Di,k = kPi+Di, Di,k £ min(Bp, H), 1£i£n, k³0}.

  • Note: only need to test all deadlines before min(Bp,H).

Processor Demand Test: Di < Pi

1

, 1

n i i i i

L D L D L C P

=

é ù æ ö ê ú

  • " Î

³ + ê ú ç ÷ ê ú ç ÷ ê ú ë û è ø ë û

å

Chenyang Lu 35

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SLIDE 36

Schedulability Test Revisited

D = P D < P Static Priority RM Utilization bound Response time DM Response time Dynamic Priority EDF Utilization bound EDF Processor demand

Chenyang Lu 36

Check out examples at http://www.cse.wustl.edu/~lu/cse467s/slides/example_sched.pdf

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Assumptions

Ø Single processor. Ø All tasks are periodic. Ø Zero context switch time. Ø Relative deadline = period. Ø No priority inversion.

Chenyang Lu 37

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Questions

Ø What causes priority inversion? Ø How to reduce priority inversion? Ø How to analyze schedulability?

Chenyang Lu 38

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Priority Inversion

Ø A low-priority task blocks a high-priority task. Ø Sources of priority inversion

q Access shared resources guarded by semaphores. q Access non-preemptive subsystems, e.g., storage, networks.

Chenyang Lu 39

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Semaphores

Ø OS primitive for controlling access to critical regions.

q Get access to semaphore S with sem_wait(S). q Perform critical region operations. q Release semaphore with sem_post(S).

Ø Mutex: only one process can hold a mutex at a time.

Chenyang Lu 40

sem_wait(mutex_info_bus); Write data to info bus; sem_post(mutex_info_bus);

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What happened to Pathfinder?

Ø …But a few days into the mission, not long after Pathfinder started gathering meteorological data, the spacecraft began experiencing total system resets, each resulting in losses of data…

Chenyang Lu 41

Real-World (Out of This World) Story: Priority inversion almost ruined the path finder mission on MARS! http://research.microsoft.com/~mbj/

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Priority Inversion

Chenyang Lu 42

1 4 4 4

2 4 6 8 10 12 14 16 18 20 22

1 1 4 critical section

T1 blocked!

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Unbounded Priority Inversion

Chenyang Lu 43

1 4 4 4

2 4 6 8 10 12 14 16 18 20 22

1 1 critical section

T1 blocked by T4,T2,T3!

3 2 4 4

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Solution

Ø The low-priority task inherits the priority of the blocked high-priority task.

Chenyang Lu 44

1 4 4 4

2 4 6 8 10 12 14 16 18 20 22

1 1 critical section

T1 only blocked by T4

Inherit priority 1!

2 3 4

Return to priority 4!

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SLIDE 45

Priority Inheritance Protocol (PIP)

Ø When task Ti is blocked on a semaphore held by Tk

q If prio(Tk) is lower than prio(Ti), prio(Ti) à Tk

Ø When Tk releases a semaphore

q If Tk no longer blocks any tasks, it returns to its normal priority. q If Tk still blocks other tasks, it inherits the highest priority of the

remaining tasks that it is blocking. Ø Priority Inheritance is transitive

q T2 blocks T1 and inherits prio(T1) q T3 blocks T2 and inherits prio(T1)

Chenyang Lu 45

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How was Path Finder saved?

Ø When created, a VxWorks mutex object accepts a boolean parameter that indicates if priority inheritance should be performed by the mutex.

q The mutex in question had been initialized with the parameter FALSE.

Ø VxWorks contains a C interpreter intended to allow developers to type in C expressions/functions to be executed on the fly during system debugging. Ø The initialization parameter for the mutex was stored in global variables, whose addresses were in symbol tables also included in the launch software, and available to the C interpreter. Ø A C program was uploaded to the spacecraft, which when interpreted, changed these variables from FALSE to TRUE. Ø No more system resets occurred.

Chenyang Lu 46

  • L. Sha, R. Rajkumar, J.P Lehoczky, Priority Inheritance Protocols: An Approach to Real-

Time Synchronization, IEEE Transactions on Computers, 39(9):1175-1185, 9/1990

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Bounded Number of Blocking

Ø Assumptions of analysis

q Fixed priority scheduling q All semaphores are binary q All critical sections are properly nested

Ø Task Ti can be blocked by at most min(m,n) times

q m: number of distinct semaphores that can be used to block Ti q n: number of lower-priority tasks that can block Ti

Chenyang Lu 47

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SLIDE 48
  • A set of periodic tasks can be scheduled by RMS/PIP if

– Tasks are ordered by priorities (T1 has the highest priority). – Bi: the maximum amount of time when task Ti can be blocked by a lower-priority task.

Extended RMS Utilization Bound

å

=

  • £

+ £ £ "

i k i i i k k

i P B P C n i i

1 / 1

) 1 2 ( , 1 ,

Chenyang Lu 48

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SLIDE 49
  • Consider the effect of blocking on response time:
  • The analysis becomes sufficient but not necessary.

Extended Response Time Analysis

1 1 i i i i i j j j

R R C B C P

  • =

é ù = + + ê ú ê ú ê ú

å

Chenyang Lu 49

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SLIDE 50

Priority Ceiling

Ø C(Sk): Priority ceiling of a semaphore Sk

q Highest priority among tasks requesting Sk.

Ø A critical section guarded by Sk may block task Ti only if C(Sk) is higher than prio(Ti)

Chenyang Lu 50

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SLIDE 51

Compute Bi

Assumption: no nested critical sections. /* potential blocking by other tasks */ B1=0; B2=0; for each Tj with priority lower than Ti {

b1 = longest critical section in Tj that can block Ti B1 = B1 + b1

} /* potential blocking by semaphores */ for each semaphore Sk that can block Ti {

b2 = longest critical section guarded by Sk among lower priority tasks B2 = B2 + b2

} return min(B1, B2)

Chenyang Lu 51

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SLIDE 52

Priority Ceiling Protocol

Ø Priority ceiling of the processor: The highest priority ceiling

  • f all semaphores currently held.

Ø A task can acquire a resource only if

q the resource is free, AND q it has a higher priority than the priority ceiling of the system.

Ø A task is blocked by at most one critical section. Ø Higher run-time overhead than PIP.

Chenyang Lu 52

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Assumptions

Ø Single processor. Ø All tasks are periodic. Ø Zero context switch time. Ø Relative deadline = period. Ø No priority inversion.

Chenyang Lu 53

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Hybrid Task Set

Ø Periodic tasks + aperiodic tasks Ø Problem: arrival times of aperiodic tasks are unknown Ø Sporadic task with a hard deadline

q Inter-arrival time must be lower bounded q Schedulability analysis: treated as a periodic task with period =

minimum inter-arrival time à can be very pessimistic.

Ø Aperiodic task with a soft deadline

q Possibly unbounded inter-arrival time q Maintain hard guarantees on periodic tasks q Reduce response time of aperiodic tasks

Chenyang Lu 54

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SLIDE 55

Background Scheduling

Ø Handle aperiodic requests with the lowest-priority task Ø Advantages

q Simple q Aperiodic tasks usually have no impact on periodic tasks.

Ø Disadvantage

q Aperiodic tasks have very long response times when the utilization of

periodic tasks is high.

Ø Acceptable only if

q System is not busy q Aperiodic tasks can tolerate long delays

Chenyang Lu 55

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SLIDE 56

Polling Server

Ø A periodic task (server) serves aperiodic requests.

q Period: Ps q Capacity: Cs

Ø Released periodically at period Ps Ø Serves any pending aperiodic requests Ø Suspends itself until the end of the period if

q it has used up its capacity, or q no aperiodic request is pending

Ø Capacity is replenished to Cs at the beginning of the next period

Chenyang Lu 56

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Example: Polling Server

Chenyang Lu 57

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Schedulability

Ø Polling server has the same impact on periodic tasks as a periodic task.

q n tasks with m servers: Up + Us £ Ub(n+m)

Ø Disadvantage: If an aperiodic request “misses” the server, it has to wait till the next period. à long response time. Ø Can have multiple servers (with different periods) for different classes of aperiodic requests

Chenyang Lu 58

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SLIDE 59

Deferrable Server (DS)

Ø Preserve unused capacity till the end of the current period à shorter response to aperiodic requests. Ø Impact on periodic tasks differs from a periodic task.

Chenyang Lu 59

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SLIDE 60

Example: Deferrable Server

Chenyang Lu 60

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SLIDE 61
  • Under RMS
  • As n à ¥:

– When Us = 0.186, min Ub = 0.652

  • System is schedulable if

RM Utilization Bound with DS

ú ú û ù ê ê ë é

  • ÷

÷ ø ö ç ç è æ + + + = 1 1 2 2

/ 1 n s s s b

U U n U U

Chenyang Lu 61

÷ ÷ ø ö ç ç è æ + + + = 1 2 2 ln

s s s b

U U U U

÷ ÷ ø ö ç ç è æ + + £ 1 2 2 ln

s s p

U U U

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SLIDE 62

DS: Middleware Implementation

ACE Timer Queue Kokyu Dispatching Queue Budget Manager Thread Server Thread Aperiodic Events Periodic Events Kokyu Dispatching Queue Periodic Events Kokyu Dispatching Queue Dispatching Thread Dispatching Thread High Priority Low Priority

Chenyang Lu 62

  • First DS implementation on top of priority-based OS (e.g., Linux, POSIX)
  • Server thread processes aperiodic events (2nd highest priority)
  • Budget manager thread (highest priority) manages the budget and controls the

execution of server thread

Budget Exhausted Timer Replenish Timer

  • Y. Zhang, C. Lu, C. Gill, P. Lardieri, G. Thaker, Middleware

Support for Aperiodic Tasks in Distributed Real-Time Systems, RTAS'07.

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Assumptions

Ø Single processor. Ø All tasks are periodic. Ø Zero context switch time. Ø Relative deadline = period. Ø No priority inversion.

Chenyang Lu 63

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Context Switch Time

Ø RTOS usually has low context switch overhead. Ø Context switches can still cause overruns in a tight schedule.

q Leave margin in your schedule.

Ø Techniques exist to reduce number of context switches by avoiding certain preemptions. Ø Other forms of overhead: cache, thread migration, interrupt handling, bus contention, thread synchronization…

Chenyang Lu 64

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SLIDE 65

Fix an Unschedulable System

Ø Reduce task execution times. Ø Reduce blocking factors. Ø Get a faster processor. Ø Replace software components with hardware. Ø Multi-processor and distributed systems.

Chenyang Lu 65