RD53A Iref Trim and Injection Fine Delay Settings Aleksandra, - - PowerPoint PPT Presentation

RD53A Iref Trim and Injection Fine Delay Settings

Aleksandra, Charilou, Timon

2/2/18 RD53A Testing -- Iref Trim & InjDelay 1

Iref Trim Setup

• Current reference generated by chip;

used to obtain reference voltage. Need to trim to get optimal value.

• Used jumpers on the Iref_Trim pins to

change analog Iref Trim Settings. (Will later be set by wire bonds.)

• Measured current on Iref IO with

Keithley 2410

2/2/18 RD53A Testing -- Iref Trim & InjDelay 2

Iref Trim Results

• Tested 5 different chips
• Nominal value (4uA)

found on setting 6-11, depending on the chip

2/2/18 RD53A Testing -- Iref Trim & InjDelay 3

Iref Trim Settings 2 4 6 8 10 12 14 A] µ Current [ 3 3.5 4 4.5 5

RD53A

0x0C96 0x072A 0x0718 0x0717 0x0C94

Injection Fine Delay Setup

• Two calibration signals

(CAL_edge and CAL_aux) used to control the amount

• f charge injection.
• Injection Fine Delay controls

the timing of the CAL_edge pulse

• Used register 39 to adjust the

fine delay value and measured with an

• scilloscope

2/2/18 RD53A Testing -- Iref Trim & InjDelay 4

Injection Fine Delay Results

• Tested 3 chips; each point

varied by 0-100ps (50ps resolution)

• Linear fit
• Base clock is 156.25MHz,

so the fine delay works with 625MHz. Expected slope is 1/625MHz=1.6ns.

2/2/18 RD53A Testing -- Iref Trim & InjDelay 5

Injection Fine Delay Setting 2 4 6 8 10 12 14 t [ns] ∆ 2 4 6 8 10 12 14 16 18 20

y = a + b x 0.29417 ± a = -0.75192 0.03706 ± b = 1.59808

RD53A 0x0C96