Radiation Tests on IHP’s SiGe Technologies for the Front-End Detector Readout in the S-LHC M. Ullán, S. Díez, F. Campabadal, G. Pellegrini, M. Lozano CNM (CSIC), Barcelona
Framework Increased luminosity at S-LHC � 2 main challenges on Electronics: � Instantaneous ⇒ High occupancy ⇒ pile up � Higher segmentation � More channels � Power, Services � Increased shaping time � Speed, Power � Integrated ⇒ Radiation Degradation � Charge Collection Efficiency ↓ � Signal ↓ � Gain, Power � Gain degradation � Current ↑ � Power � Noise degradation � S/N ↓ � Noise, Power � Need to find a proper technology that deals with these challenges � High speed, high gain with � Low power consumption � Radiation degradation � Cost, availability (prototyping, long term production) 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
General Aims � Evaluation of SiGe BiCMOS technologies for the readout of the upgraded ATLAS ID � Evaluate radiation hardness � Prove power saving with speed and gain � Proposal of one SiGe BiCMOS technology for the IC-FE design � Design of a prototype Front End IC. 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
IHP’s SiGe Technologies Low cost Main 200 GHz Alternative 0.13 µ m 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Experiments � 2 general experiments: � Exp 1: “first approximation” � 2 technologies � Gamma irradiations up to 10 and 50 Mrads(Si) � Neutron irradiations � Exp 2: Final total dose results � 3 technologies � Gamma irradiations up to 10 and 50 Mrads(Si) 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 1: Samples � 2 Test chip wafer pieces with ~20 chips � 2 Technologies: � SGC25C (bip. module equivalent to SG25H1) � SG25H3 (Alternative technology) � Edge effects: Solved in next samples 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Irradiation Setup � 4 chips per board, 2 of each technology � 2 different transistor sizes: � 0.21 x 0.84 μ m 2 � 0.42 x 0.84 μ m 2 � Biased � Pb(2 mm) – Al(2 mm) shielding box � NAYADE: “Water Well” Co60 source at Madrid (CIEMAT) ~300 rad(Si)/s up to 10 Mrad(Si) 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
IHP’s SGC25C Technology � Bip. tr. equivalent to SG25H1 technology (f T = 200 GHz) � No Annealing ! 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
IHP’s SG25H3 Technology � f T = 120 GHz, Higher breakdown voltages � Annealing after 50 Mrads: 48 hours, very good recovery � Very low gains before irrad (edge wafer transistors) 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Results Exp 1 � Excess Base Current @ 0.7 V [10 Mrad(Si)] 5.E+00 5.E+00 Excess Base Current ( ΔΙ Β /ΔΙ Β0 ) SGC25 SG25H3 4.E+00 4.E+00 3.E+00 unbiased 3.E+00 2.E+00 2.E+00 1.E+00 5.E-01 0.E+00 1 1 1 1 1 1 1 1 1 1 1 1 1 1 N X N X N X N X 6 6 2 4 2 4 A A A A A A 1 2 3 4 1 2 3 4 C C C C 3 4 3 3 4 4 C C C C C C C C C C 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Results Exp 1 � Bias Current for beta > 50 after 10 Mrad(Si) 1.2E-05 1.1E-05 SGC25C SG25H3 1.0E-05 9.0E-06 unbiased 8.0E-06 IC(Beta>50) (A) 7.0E-06 6.0E-06 5.0E-06 4.0E-06 3.0E-06 2.0E-06 1.0E-06 0.0E+00 1 1 1 1 1 1 1 1 1 1 1 1 1 1 N X N X N X N X 6 6 2 4 2 4 A A A A A A 1 1 2 2 3 3 4 4 C C C C C C C C 3 4 3 3 4 4 C C C C C C 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples � 3 Test chip wafer center pieces with > 20 chips � 3 Technologies: � SG25H1 (“Wafer D”) � SG25H3 (“Wafer I”) � SGC25VD (“Wafer V”) 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples β target = 190 � 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples β target = 190 � 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples � No edge effect in the area of interest S461c (Y3) S462b (Z2) 8 8 7 7 6 6 5 5 185-205 165-185 4 4 145-165 125-145 105-125 3 3 2 2 1 1 18 16 10 14 12 20 0 0 5 5 5 5 5 5 -3 -2 -1 0 1 2 3 -3 -2 -1 0 1 2 3 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples β target = 200 � 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Samples β target = 150 � 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Heavy rad damage � Transistors heavily damaged but still functional � Possible damage saturation � Significant beneficial annealing 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Results Exp 2 � Normalized gain β f / β 0 @V BE = 0.7 V 1 10Mrad SG25H1 SG25H3 SGB25VD 0.9 10Mrad+ANN 50Mrad 0.8 50Mrad+ANN 0.7 0.6 Beta N 0.5 0.4 0.3 0.2 0.1 0 FJ1N FJ2N FJ3N FJ4N FL1N FL2N FL3N FL4N FL1X FL2X FL3X FL4X FM1Y3 FM2Y3 FM3Y3 FM4Y4 FM1Z2 FM2Z2 FM3Z2 FM4Z2 FM1Z3 FM2Z3 FM3Z3 FM4Z3 Transistor 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Results Exp 2 � Normalized base current density J Bf /J B0 @V BE = 0.7 V 14 10Mrad SG25H1 SG25H3 SGB25VD 10Mrad+ANN 12 50Mrad 50Mrad+ANN 10 8 Jb N 6 4 2 0 FJ1N FJ2N FJ3N FJ4N FL1N FL2N FL3N FL4N FL1X FL2X FL3X FL4X FM1Y3 FM2Y3 FM3Y3 FM4Y4 FM1Z2 FM2Z2 FM3Z2 FM4Z2 FM1Z3 FM2Z3 FM3Z3 FM4Z3 tr 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Results Exp 2 � Collector current needed for β = 50 1.E-04 10Mrad 10Mrad+ANN SG25H1 SG25H3 SGB25VD 50Mrad 50Mrad+ANN 1.E-05 ~ 3 μ A Ic(50) [A] 1.E-06 1.E-07 1.E-08 FJ1N FJ2N FJ3N FJ4N FL1N FL2N FL3N FL4N FL1X FL2X FL3X FL4X FM1Y3 FM2Y3 FM3Y3 FM4Y4 FM1Z2 FM2Z2 FM3Z2 FM4Z2 FM1Z3 FM2Z3 FM3Z3 FM4Z3 tr 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Tech. comparison � Current Gain Degradation 1 0.9 0.8 SG25H1 0.7 SG25H3 Normalized Gain 0.6 SGB25VD 0.5 0.4 0.3 0.2 0.1 0 0 10 20 30 40 50 60 Gamma Dose [Mrad(Si)] 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Exp 2: Tech. comparison � Collector current for β = 50 1.E-04 SG25H1 No annealing SG25H3 1.E-05 SGB25VD Ic (Beta = 50) 1.E-06 1.E-07 10 50 Gamma Dose [Mrad(Si)] 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Other results � Annealing: Annealing Jb N 9 FM1Y3 8 FM2Y3 FM1Z2 7 FM2Z2 6 FM3Z2 FM4Z2 5 Jb N FM1Z3 FM2Z3 4 FM3Z3 3 FM4Z3 2 1 0 0 5 10 15 20 25 Days 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Other results � Biasing: 10.00 9.00 10 Mrad(Si) 8.00 50 Mrad(Si) 7.00 Norm. Excess J B 6.00 5.00 4.00 3.00 2.00 1.00 0.00 BIASED GROUNDED FLOATING 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Conclusions � Evaluation of three different IHP’s SiGe BiCMOS technologies � Results indicate that IHP’s technologies would remain functional after S-LHC life span � Not large differences in degradation among technologies, although one can see: � Higher damages in SG25H1 technology, � lower damages in SG25H3 technology � Annealing behavior studied, saturation is observed. � It has been proven that device irradiations with floating terminals produce an over-damage on the devices. Small damage differences between biasing or grounding the devices during irradiations. 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
Future work 100 Mrads(Si) total dose � LDRE – damage vs. dose mapping � Measure more devices/components of technologies � More statistics needed for a finer data analysis � Study emitter geometry influence � Specific TEST CHIP for irradiations is being designed � Investigate damage under n and p irradiation � Temperature influence � � Compare with other SiGe technologies � Choose � DESIGN FE CHIP 8th RD50 Workshop Prague, June 2006 Miguel Ullán – CNM, Barcelona
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