PICS project Project at a Glance Future of integrated capacitors - - PowerPoint PPT Presentation

pics project
SMART_READER_LITE
LIVE PREVIEW

PICS project Project at a Glance Future of integrated capacitors - - PowerPoint PPT Presentation

PICS project Project at a Glance Future of integrated capacitors New generation of high density 3D integrated capacitors Develop adequate industrial tools (batch ALD, etching) Funded by FP7-SME 2 years program 1M of EU


slide-1
SLIDE 1

PICS project

Project at a Glance

Future of integrated capacitors

→ New generation of high density 3D integrated capacitors → Develop adequate industrial tools (batch ALD, etching)

Funded by FP7-SME

→ 2 years program → 1M€ of EU contribution

Consortium

→ 3 SMEs from France, Germany and Finland → 2 RTD from France and Germany

slide-2
SLIDE 2

PICS project

Context

Offering solutions for highly integrated and high performances electronic modules

→ Target high-end markets like medical or aeronautics…

Technological gap for IPDiA's PICS capacitors

→ Higher density, higher voltage of use, long terms reliability

Choice of ALD deposition

→ Develop the associated tools (batch, etching) to get an industrial solution

slide-3
SLIDE 3

PICS project

Main Goals / Objectives

Develop a new generation of integrated capacitors

→ World record 500nF/mm² capacitors into silicon → High stability and reliability, low leakage → New dielectric deposited by ALD → ALD batch equipment to reduce cost-of-ownership → Leading edge technology for thick high-K materials

Assess the manufacturability

→ Develop adequate industrial tools (batch ALD, etching) → Reliability studies

slide-4
SLIDE 4

PICS project

Concept

Integration of the new dielectric into the IPDiA process with less changes as possible Deposition by ALD into 3D trench capacitors with the right thickness and composition Find suitable dielectric stacks to fulfill High Density and High Voltage requirements Start a qualification procedure to ensure long term reliability Cost effective batch ALD tool and high-k dielectric etching tool, compatible with 6’’ IPDiA process

slide-5
SLIDE 5

PICS project

Main achievements

IPDiA's specs fulfilled for all applications

→ Developments of suitable dielectric stacks and their integration into 3D trench capacitors → Miniaturization in medical domain : 500nF/mm² , Vbd > 12V → Miniaturization in harsh environment (industrial, automotive) : 150nF/mm² , Vbd > 25V

Picosun tool ready for batch processing

→ Better uniformity, step coverage, throughput, material properties ...

High-K etching process transfered to Sentech tool and ready for exploitation

slide-6
SLIDE 6

PICS project

IPDiA

Independent Company located in Caen, Normandy, France Dedicated to manufacturing of leading edge Integrated Passive Devices 15 M€ revenues, 100 people and operating

  • wn Silicon wafer fab

Strong R&D team and collaborations with leading research institutes

slide-7
SLIDE 7

PICS project

Picosun

slide-8
SLIDE 8

PICS project

Sentech

slide-9
SLIDE 9

PICS project

CEA-Leti

Research and technology institute located in Grenoble, France Create innovation and transfer it to industry 1700 employees, 250M€ budget, 8000m² clean rooms, 500 process tools Activities in energy, healthcare, IT, defence and security

slide-10
SLIDE 10

PICS project

Fraunhofer IPMS-CNT

Located north of Dresden, next to semiconductor manufacturers Globalfoundries, Infineon, X-Fab Research and development for micro- and nanoelectronics manufacturing

→ Nanopatterning, High-k-based Devices, Interconnects

8 M€ budget, staff of 51

slide-11
SLIDE 11

PICS project

Contact Information

Charlotte JENNEQUIN - IPDiA Phone: +33(0)2 31 535 400 2 rue de la girafe 1400 Caen France

http://www.fp7-pics.eu

The PICS project has received funding from the European Union's Seventh Framework Program managed by REA-Research Executive Agency http://ec.europa.eu/rea (FP7/2007- 2013) under grant agreement n° FP7-SME-2013-2-606149.