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Physical Design Challenges in the Chip Power Distribution Network Farid N. Najm Professor & Chair ECE Dept, University of Toronto f.najm@utoronto.ca Outline Introduction Power grid topology Physical design challenges Power


  1. Physical Design Challenges in the Chip Power Distribution Network Farid N. Najm Professor & Chair ECE Dept, University of Toronto f.najm@utoronto.ca

  2. Outline ■ Introduction ● Power grid topology ● Physical design challenges ■ Power grid verification ● EDA: simulation, vectorless verification ● Engineering solution: over-design, and over-kill ■ Constraints-based verification ● Voltage variations ● Electromigration ■ Constraints generation ■ Conclusion F. N. Najm Challenges in Power Grid 2

  3. Power Grid Topology V dd ■ ~ a Billion nodes ■ ~ 2,000 C4 pads Pads RLC RLC RLC Pkg, PCB ● 1,000 V dd , 1,000 V ss RC Layer ■ All levels of metal stack RC Layer RC Layer ■ Hundreds of millions of Circuit current instances of logic cells sources F. N. Najm Challenges in Power Grid 3

  4. Power Grid Topology ■ Package, motherboard, and VRM model; inductance! F. N. Najm Challenges in Power Grid 4

  5. Power-Managed Chip Grid V dd V dd Pads Pads RLC RLC RLC RLC RLC RLC ■ Gated Pkg, PCB Pkg, PCB Global (un-gated) Grid supplies M7 (RC Layer) M6 (RC Layer) M5 (RC Layer) M4 M4 (RC Layer) M4 M4 (RC Layer) ■ Voltage Local (gated) Grid islands M3 M3 (RC Layer) M3 M3 (RC Layer) M2 M2 (RC Layer) M2 M2 (RC Layer) ■ Active M1 M1 (RC Layer) M1 M1 (RC Layer) devices! Gate Gate Circuit current Circuit current FET FET sources sources F. N. Najm Challenges in Power Grid 5

  6. Mesh Layer Structure ■ In every layer, the grid is mostly a regular mesh. Metal 4 Gnd 3 Vdd l a t Gnd e M Vdd Gnd Vdd ■ Note: ● Many variations on this central theme ● Top layer C4 pads typically on a ~200 µ m grid ● Local non-uniformities make room for signal routing F. N. Najm Challenges in Power Grid 6

  7. Physical Design ■ With hundreds of millions of instances on die and clocks running at GHz rates, the total power is high ● High performance SOCs might consume over 150 Watts ● Very hard to keep supply regulated under such conditions ■ Physical design of the grid can have big impact: ● Voltage variations in bottom layers impact circuit timing ● Voltage overshoot (inductive kick) impact I/O signal noise ● Electromigration damage can be catastrophic throughout ■ N ightmare: ensure circuit is safe from all this while distributing over 150 Amps to >400 million instances F. N. Najm Challenges in Power Grid 7

  8. Power Grid Verification F. N. Najm Challenges in Power Grid 8

  9. Power Grid Verification ■ Verification is needed to check the grid design: ● Early high-level grid verification and planning ● Incremental verification during redesign cycles ● Detailed grid verification at sign-off time ■ Key problem: ● The circuit currents are unknown or highly uncertain! ■ Need reliable verification in the face of uncertainty. F. N. Najm Challenges in Power Grid 9

  10. Existing Commercial Solutions ■ Simulation ● Decouple grid from underlying circuit ● Simulate the grid for given current source stimulus ● Expensive and incomplete; inconclusive ■ Existing solutions for vectorless verification ● Voltage variations: timing windows, random scenarios ● Electromigration: Black’s model, current density check ● Questionable results ■ Engineering solution: over-design, but also over-kill ■ Problem: running out of metal area for signal routing! F. N. Najm Challenges in Power Grid 10

  11. Constraints-Based Verification F. N. Najm Challenges in Power Grid 11

  12. Constraints-Based Verification ■ Given: ● Power Grid (DC, RC, or RLC netlist) ● Tolerance for grid node voltage fluctuations ( V th ) ● Tolerance for grid branch current densities (EM) ● Peak budgets (current constraints) for block currents ■ Find: ● Worst-case voltage variations for every grid node ● Worst-case current variations in every grid branch ■ Features: ● Based on user-provided current constraints (budgets) ● Search/optimization (LP) approach for verification ● Allows vectorless early high-level power grid verification F. N. Najm Challenges in Power Grid 12

  13. Current Constraints - Example ■ Local Constraints Global Constraint 1 1 2 3 + - V dd I 3 I 2 4 5 6 I 5 ■ Global Constraints 8 7 9 I 7 I 9 Global Constraint 2 F. N. Najm Challenges in Power Grid 13

  14. Voltage Drop: The RC Case ■ Define as the vector of worst-case voltage drops, at all nodes, over all transient currents in space ■ Define: shorthand notation for element-wise max:  max i ∈ F [ v 1 ( i )]  max i ∈ F [ v 2 ( i )]     emax i ∈ F [ v ( i )] =   .  .  .     max i ∈ F [ v n ( i )] ■ Use upper-bound: F. N. Najm Challenges in Power Grid 14

  15. Performance F. N. Najm Challenges in Power Grid 15

  16. Voltage Drop/Rise: The RLC Case F. N. Najm Challenges in Power Grid 16

  17. Electromigration: The Mesh Model Traditional EM ■ model is “series” But power grid has ● much redundancy Vector-based mesh ■ model approach 3-4X lifetime! ● Can be 30-40X ● Vectorless Mesh ■ model approach F. N. Najm Challenges in Power Grid 17 Chatterjee 2013, Fawaz 2013

  18. Progress Towards Failure F. N. Najm Challenges in Power Grid 18

  19. Progress towards failure Series ¡ F. N. Najm Challenges in Power Grid 19

  20. Progress towards failure Series ¡ F. N. Najm Challenges in Power Grid 20

  21. Progress towards failure Series ¡ F. N. Najm Challenges in Power Grid 21

  22. Progress towards failure Series ¡ F. N. Najm Challenges in Power Grid 22

  23. Failure when v(t) > v th Series ¡ Mesh ¡ F. N. Najm Challenges in Power Grid 23

  24. Results: MTF Comparisons ■ MTF estimation for the largest grid, with 1M nodes required 97 Monte Carlo iterations and 13.5 hrs. F. N. Najm Challenges in Power Grid 24

  25. But … there is a Problem ■ Ongoing development: ● Electromigration verification ◆ Physical models to further reduce pessimism ● Fast hierarchical/modular verification ◆ Boundary conditions to ensure sub-grid safety ■ But there is a fundamental issue with usability of the constraints-based approach: The constraints are hard to specify F. N. Najm Challenges in Power Grid 25

  26. Constraints Generation F. N. Najm Challenges in Power Grid 26

  27. Alternative Approach ■ Constraints Generation (the “inverse” problem): ● Generate circuit current constraints which, if satisfied by the underlying circuitry, would guarantee grid safety ■ Applications: ● Encapsulate much useful information about the grid, captured in useful quality metrics (peak power, other) ● Provides power budgets to drive design process, allowing rebudgeting, or early hints for grid redesign or new floorplan ● During low level physical design, allow local checks for block compliance with grid safety constraints w/o grid simulation ● Local checks in safety “islands” may be enough F. N. Najm Challenges in Power Grid 27

  28. Voltage Islands (RC case) ■ Typically, we find the constraints decoupled into “islands” ■ Checking of the local regions, independently ■ Parallel flow for verification F. N. Najm Challenges in Power Grid 28

  29. Container ■ Definition: F. N. Najm Challenges in Power Grid 29

  30. Safe Container ■ Rewriting the upper-bound on the exact worst-case voltage drop: where and ■ We want to generate such that , from which and the grid is safe! ■ Definition: A container is said to be safe if: F. N. Najm Challenges in Power Grid 30

  31. All Safe Containers ■ Let and define the two sets: V th ■ Lemma: is safe for any , and: ● All possible safe containers may be found as either specific instances of , or as subsets of such instances. F. N. Najm Challenges in Power Grid 31

  32. Maximal Container ■ It’s enough to look at the set of all safe containers: ■ Define a safe container to be maximal if it’s not a subset of any other safe container. ■ We are interested in maximal containers! F. N. Najm Challenges in Power Grid 32

  33. All Maximal Containers ■ Theorem: Maximal V th Irreducible Safe F. N. Najm Challenges in Power Grid 33

  34. Desirable Maximal Containers ■ The space of maximal safe containers represents a quality assessment for a power grid ● What levels of current will this grid safely distribute? ■ Example: suppose the chip is expected to draw a peak power of 150W at 1V supply ● A grid may be deemed unacceptable if no safe container for it can be found that allows a peak total supply current of 150A ■ Design objectives must drive the choice of container! F. N. Najm Challenges in Power Grid 34

  35. Container Generation Algorithms ■ Peak Power Problem (P1): ● Generate a container that allows the largest possible peak power dissipation (instantaneous, total) ■ Uniform Current Problem (P2): ● Generate a container that does not severely limit the allowed supply current anywhere on the die F. N. Najm Challenges in Power Grid 35

  36. Algorithms ■ P1: peak power ■ P2: uniform budgets ● One LP ● One LP ■ We can prove that both resulting are maximal! F. N. Najm Challenges in Power Grid 36

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