1
Part III Synchronization
Software and Hardware Solutions
Fall 2015
Computers are useless. They can only give answers. Pablo Picasso
Part III Synchronization Software and Hardware Solutions Computers - - PowerPoint PPT Presentation
Part III Synchronization Software and Hardware Solutions Computers are useless. They can only give answers. 1 Fall 2015 Pablo Picasso So Softwa ware re So Solut ution ons s for or Two Pr Tw o Proc oces esse ses Suppose we
1
Fall 2015
Computers are useless. They can only give answers. Pablo Picasso
2
j = 1- i. Thus, if i = 0, then j = 1 and if i = 1, then j = 0.
critical section to ensure mutual exclusion.
and finally obtain a correct one.
3
turn controls who can enter the critical section.
0 or 1, only one can enter.
are forced to run in an alternating way.
good! d!
do { while (turn != i); turn = j; } while (1);
critical section enter exit
if it is not my turn, I wait I am done, it is your turn now
process Pi
4
utua ual Ex Excl clus usion
in their CSs, then turn=0 and turn=1 must BOTH be true.
a variable can only hold
(i.e., cannot hold both 0 and 1) at any time.
do { while (turn != i); turn = j; } while (1);
critical section enter exit
if it is not my turn, I wait I am done, it is your turn now
process Pi
5
rogr gres ess
never uses the critical section again, Pj can enter but cannot enter again.
process blocks other processes from entering a critical section. Not
good! good!
hold? Exe xerc rcise se!
do { while (turn != i); turn = j; } while (1);
critical section enter exit
if it is not my turn, I wait I am done, it is your turn now
process Pi
6
flag[i] is the “state”
to enter, waits for Pj to exit, enters its section, and, finally, changes to “I am out” upon exit.
bool flag[2]; do { flag[i] = TRUE; while (flag[j]); flag[i] = FALSE; }
critical section enter exit
I am interested wait for you I am not interested
7
utua ual Ex Excl clus usion
is TRUE AN AND flag[1] is FALSE.
is TRUE AN AND flag[0] is FALSE.
flag[0] must be both TRUE and FALSE.
bool flag[2]; do { flag[i] = TRUE; while (flag[j]); flag[i] = FALSE; }
critical section enter exit
I am interested wait for you I am not interested
8
rogr gres ess
flag[0] and flag[1] to TRUE at the same time, then both will loop at the while forever and no one can enter.
made in finite time.
bool flag[2]; do { flag[i] = TRUE; while (flag[j]); flag[i] = FALSE; }
critical section enter exit
I am interested wait for you I am not interested
9
nded ed W Wai aiti ting ng
but switched out before setting flag[0] to TRUE.
flag[0] being not
this way repeatedly many
fixed bound for P0.
bool flag[2]; do { flag[i] = TRUE; while (flag[j]); flag[i] = FALSE; }
critical section enter exit
I am interested wait for you I am not interested
10
bool flag[2]; do { flag[i] = TRUE; while (flag[j]); flag[i] = FALSE; }
critical section enter exit
I am interested wait for you I am not interested
P0 P1 flag[0] flag[1]
LOAD #0 F F flag[1]=T F T while .. F T in CS flag[1]=F F F loop back
flag[i] = LOAD i LOAD address flag[i] MOVE T or F to flag[i] P0 is switched out here a context switch may occur here
11
bool flag[2] = FALSE; int turn; do { flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[i] = FALSE; }
critical section enter exit
I am interested yield to you first wait while you are interested and it is your turn. I am done
// process Pi
12
flag[i] to TRUE turn to j (but turn may not be j after this point because Pj may ay set it to i later). and waits until flag[j] && turn == j becomes FALSE
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
13
flag[j] to TRUE turn to i (but turn may not be i after this point because Pi may ay set it to j later). and waits until flag[i] && turn == i becomes FALSE
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
14
sections, then we have: flag[i] and flag[j] are both TRUE. flag[i] && turn == i and flag[j] && turn == j are both FALSE. Therefore, turn == i and turn == j must both be FALSE.
they are both TRUE flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
15
FALSE and since turn is set to j (by Pi) or i (by Pj) before entering the critical section, only one of turn == i and turn == j can be FALSE but not both.
exclusion holds.
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
16
At Atte tempt mpt III: : Mu Mutu tual l Exclusion usion 6/1 /12
to establish the mutual exclusion condition.
Find the condition C0 for P0 to enter its CS Find the condition C1 for P1 to enter its CS If P0 and P1 are in their critical sections, C0 and C1 must both be true. From C0 and C1 being true, we should be able to derive an absurd result. Therefore, mutual exclusion holds.
17
At Atte tempt mpt III: : Mu Mutu tual l Exclusion usion 7/1 /12
reaching these conditions via instruction execution is un-important.
which is usually referred to as proof by example.
being false. But, you cannot use a single example to show a proposition being true. That is, 32 + 42 = 52 cannot be used to prove a2 + b2 = c2 for any right triangles.
18
sections, since the value of turn can only be i or j but not both, one process can pass its while loop (i.e., decision time is finite).
its CS: Since Pj is not interested in entering, flag[j] was set to FALSE when Pj exits and Pi enters. Thus, the process that is not entering does not influence the decision.
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
19
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
20
sets flag[j] to FALSE when it exits its critical section, and Pi may enter.
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
21
If turn is i (e.g., Pi sets turn to j before Pj sets turn to i), Pi enters immediately. Otherwise, Pj enters and Pi stays in the while loop, and we have CASE 3.
flag[i] = TRUE; turn = j; while (flag[j] && turn == j); flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
22
must be j and Pi waits for at most one round.
flag[i] = TRUE; turn = j; while (flag[j] && turn == j);
Pi Pj flag[i] flag[j] turn Comments flag[i]=T flag[j]=T TRUE TRUE ? while (…) TRUE TRUE j Pj enters Critical Sec Pj in CS flag[j]=F TRUE FALSE j Pj exits flag[j]=T TRUE TRUE j Pj returns turn = i TRUE TRUE i Pj yields while (…) TRUE TRUE i Pj loops Critical Sec Pi enters Pi has a chance to enter here.
flag[j] = TRUE; turn = i; while (flag[i] && turn == i);
process Pi process Pj
if Pj comes back fast
23
synchronization supports: Disabling/Enabling interrupts: This is slow and difficult to implement on multiprocessor systems. Special privileged, actually atomic, machine instructions: Test and set (TS) Swap Compare and Swap (CS)
24
disabled, no context switch can occur in a critical section (why?).
multiprocessor system because all CPUs/cores must be informed.
depend on interrupts (e.g., clock) may not work properly.
do { } while (1); disable interrupts enable interrupts critical section entry exit
25
as the TS instruction is
waiting may not be
rogr gres ess? s?
bool TS(bool *key) { bool save = *key; *key = TRUE; return save; } do { while (TS(&lock)); lock = FALSE; } while (1); critical section bool lock = FALSE; entry exit
26
the TS instruction returns FALSE.
their critical sections, they both got the FALSE return value from TS.
instructions at the same time because TS is atomic.
the TS instruction before the other.
lock becomes TRUE.
and cannot enter its CS.
bool lock = FALSE; do { while (TS(&lock)); lock = FALSE; } while (1);
critical section
27
busy wai aiting ting.
sy waiti ting ng means a process waits by executing a tight loop to check the status/value of a variable.
however, it wastes CPU cycles that some other processes may use productively.
atomic instructions, unless the system is lightly loaded, CPU and system performance can be low, although a programmer may “think” his/her program looks more efficient.
28