On the design space of Parallel Nesting
Nuno Diegues Jo˜ ao Cachopo
nmld, joao.cachopo@ist.utl.pt INESC-ID/Technical University of Lisbon
July 19, 2012
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On the design space of Parallel Nesting Nuno Diegues Jo ao Cachopo - - PowerPoint PPT Presentation
On the design space of Parallel Nesting Nuno Diegues Jo ao Cachopo nmld, joao.cachopo@ist.utl.pt INESC-ID/Technical University of Lisbon July 19, 2012 1/18 Introduction Selling point of TM Composability 2/18 Introduction Selling point
nmld, joao.cachopo@ist.utl.pt INESC-ID/Technical University of Lisbon
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1 JVSTM 2 NesTM1 3 PNSTM2
software transactional memory. In SPAA ’10.
c, P. Ferreira, R. Guerraoui, and M. Kapalka. Leveraging parallel nesting in transactional memory. In PPoPP ’10. 4/18
1 JVSTM ← 2 NesTM1 3 PNSTM2
software transactional memory. In SPAA ’10.
c, P. Ferreira, R. Guerraoui, and M. Kapalka. Leveraging parallel nesting in transactional memory. In PPoPP ’10. 4/18
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A B C
maxDepth
D E
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A B C D E
committed committed children 5/18
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A B C
txDepth
D E
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2 4 6 8 10 12 14 16 18 1(1) 1(2) 1(3) 2(3) 4(3) 8(3) 16(3) throughput (txs/sec) # threads tops(nested) jvstm nestm pnstm 10/18
2 4 6 8 10 12 14 16 18 1(1) 1(2) 1(3) 2(3) 4(3) 8(3) 16(3) throughput (txs/sec) # threads tops(nested) jvstm nestm pnstm
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2 4 6 8 10 1 8 32 128 throughput (txs/sec) # depth jvstm nestm pnstm
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A
bn: ?
Pool of free bitnums: 1 2 3
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A
bn: 0
Pool of free bitnums: 1 2 3
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A
Access Stack of variable X
1 TA Ok
bn: 0
Pool of free bitnums: 1 2 3 index 0 1 2 3
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A C B
Access Stack of variable X
1 TA Ok
bn: 0 bn: 1 bn: 2
Pool of free bitnums: 1 2 3 index 0 1 2 3
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A C B
Access Stack of variable X
1 1 1 TB TA ? Ok
bn: 0 bn: 1 bn: 2
Pool of free bitnums: 1 2 3 index 0 1 2 3
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A C B
Access Stack of variable X
1 1 1 TB TA Ok Ok
bn: 0 bn: 1 bn: 2
Pool of free bitnums: 1 2 3 index 0 1 2 3
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A C B D
Access Stack of variable X
1 1 1 TB TA Ok Ok
bn: 0 bn: 1 bn: 2 bn: 3
Pool of free bitnums: 1 2 3 index 0 1 2 3
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A C B D
Access Stack of variable X
1 1 1 1 1 1 TD TB TA Ok Ok
bn: 0 bn: 1 bn: 2 bn: 3
Pool of free bitnums: 1 2 3 index 0 1 2 3
?
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A C B D
Access Stack of variable X
1 1 1 1 1 1 TD TB TA Conflict Ok Ok
bn: 0 bn: 1 bn: 2 bn: 3
Pool of free bitnums: 1 2 3 index 0 1 2 3
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timestamp
global clock: 0
tid
variable X:
tid: 1
ts: 0
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timestamp
global clock: 0 1
tid
variable X:
tid: 1
ts: 0
Ok
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
did not read X
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
X's timestamp ≤ T3's timestamp
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timestamp
global clock: 0 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
previous owner: stop
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timestamp
global clock: 0 4
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
Ok
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timestamp
global clock: 0 4
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
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timestamp
global clock: 1 3 1
tid
variable X:
tid: 2
ts: 0
tid: 3
ts: 0
tid: 1
ts: 0
RS: X
tid: 4
ts: 0
committed
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variable X:
A
Orec1
ORec1
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variable X:
A
Orec1
ORec1
B
Orec2
C
Orec3
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variable X:
A
Orec1
ORec3
B
Orec2
C
Orec3
ORec1
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variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
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variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
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variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
25/18
variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
25/18
variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
25/18
variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
25/18
variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
ts: 0
committed
Orec4
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variable X:
A
Orec1
ORec4
B
Orec2
C
Orec3
D
Orec4
ORec3 ORec1
ts: 0
committed
Orec4 Orec4 ts: 0
committed
Orec4 Orec3
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2 4 6 8 10 12 14 16 18 1 2 3 6 12 24 48 throughput (txs/sec) # threads jvstm nestm pnstm
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